zephyr/soc/riscv/esp32c3
Nazar Kazakov f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
..
CMakeLists.txt soc: riscv: esp32c3: fixes flash size reference 2022-02-07 13:22:25 -05:00
Kconfig.defconfig soc: esp32c3: prepare kconfigs and cmake to support mcuboot 2022-01-22 16:55:00 -05:00
Kconfig.soc soc: riscv: esp32c3: fixes flash size reference 2022-02-07 13:22:25 -05:00
idle.c everywhere: fix typos 2022-03-18 13:24:08 -04:00
linker.ld soc: esp32: add snippets into linker script 2022-03-14 19:19:24 -04:00
loader.c soc: esp32c3: update startup code to map IROM and DROM segments 2022-01-22 16:55:00 -05:00
soc.c soc: esp32c3: update startup code to map IROM and DROM segments 2022-01-22 16:55:00 -05:00
soc.h soc: esp32c3: update startup code to map IROM and DROM segments 2022-01-22 16:55:00 -05:00
soc_irq.S riscv: fix non-standard assembly of RISC-V 2022-02-04 11:23:39 +01:00
soc_irq.c intc: esp32c3: use source as interrupt value 2022-03-17 11:40:31 +01:00
vectors.S drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS 2021-07-07 20:58:50 -04:00