151 lines
3.1 KiB
Plaintext
151 lines
3.1 KiB
Plaintext
/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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flash0: flash@e0000 {
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reg = <0x000E0000 0x38000>;
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};
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sram0: memory@118000 {
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compatible = "mmio-sram";
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reg = <0x00118000 0x8000>;
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};
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soc {
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uart0: uart@400f2400 {
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compatible = "ns16550";
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reg = <0x400f2400 0x400>;
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interrupts = <40 0>;
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current-speed = <38400>;
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label = "UART_0";
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reg-shift = <0>;
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};
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uart1: uart@400f2800 {
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compatible = "ns16550";
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reg = <0x400f2800 0x400>;
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interrupts = <41 0>;
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current-speed = <38400>;
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label = "UART_1";
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reg-shift = <0>;
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};
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uart2: uart@400f2c00 {
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compatible = "ns16550";
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reg = <0x400f2c00 0x400>;
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interrupts = <44 0>;
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current-speed = <38400>;
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label = "UART_2";
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reg-shift = <0>;
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};
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gpioa: gpio@40081000 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081000 0x80>;
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interrupts = <3 2>;
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gpio-controller;
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label="GPIO000_036";
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#gpio-cells=<2>;
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};
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gpiob: gpio@40081080 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081080 0x80>;
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interrupts = <2 2>;
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gpio-controller;
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label="GPIO040_076";
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#gpio-cells=<2>;
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};
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gpioc: gpio@40081100 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081100 0x80>;
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gpio-controller;
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interrupts = <1 2>;
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label="GPIO100_136";
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#gpio-cells=<2>;
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};
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gpiod: gpio@40081180 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081180 0x80>;
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gpio-controller;
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interrupts = <0 2>;
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label="GPIO140_176";
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#gpio-cells=<2>;
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};
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gpioe: gpio@40081200 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081200 0x80>;
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gpio-controller;
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interrupts = <4 2>;
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label="GPIO200_236";
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#gpio-cells=<2>;
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};
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gpiof: gpio@40081280 {
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compatible = "microchip,xec-gpio";
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reg = <0x40081280 0x80>;
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gpio-controller;
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interrupts = <17 2>;
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label="GPIO240_276";
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#gpio-cells=<2>;
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};
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i2c0: i2c@40004000 {
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compatible = "microchip,xec-i2c";
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reg = <0x40004000 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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label = "I2C_0";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c@40004400 {
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compatible = "microchip,xec-i2c";
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reg = <0x40004400 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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label = "I2C_1";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c2: i2c@40004800 {
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compatible = "microchip,xec-i2c";
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reg = <0x40004800 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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label = "I2C_2";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c3: i2c@40004c00 {
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compatible = "microchip,xec-i2c";
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reg = <0x40004C00 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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label = "I2C_3";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c4: i2c@40005000 {
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compatible = "microchip,xec-i2c";
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reg = <0x40005000 0x80>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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label = "I2C_4";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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