79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief PCI probe and information routines
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*
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* Module declares routines of PCI bus initialization and query
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_PCI_PCI_H_
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#define ZEPHYR_INCLUDE_DRIVERS_PCI_PCI_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define BAR_SPACE_MEM 0
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#define BAR_SPACE_IO 1
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#define PCI_MAX_FUNCTIONS 8
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#define PCI_FUNCTION_ANY PCI_MAX_FUNCTIONS
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#define PCI_MAX_BARS 6
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#define PCI_BAR_ANY PCI_MAX_BARS
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/* PCI device information */
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struct pci_dev_info {
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u32_t addr; /* I/O or memory region address */
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u32_t size; /* memory region size */
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int irq;
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u32_t bus:8;
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u32_t dev:5;
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u32_t function:4;
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u32_t mem_type:1; /* memory type: BAR_SPACE_MEM/BAR_SPACE_IO */
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u32_t class_type:8;
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u32_t bar:3;
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u32_t _reserved:3;
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u16_t vendor_id;
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u16_t device_id;
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};
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#ifdef CONFIG_PCI_ENUMERATION
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extern void pci_bus_scan_init(void);
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extern int pci_bus_scan(struct pci_dev_info *dev_info);
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#else
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#define pci_bus_scan_init(void) { ; }
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static inline int pci_bus_scan(struct pci_dev_info *dev_info)
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{
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return 1;
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}
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#endif /* CONFIG_PCI_ENUMERATION */
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void pci_enable_regs(struct pci_dev_info *dev_info);
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void pci_enable_bus_master(struct pci_dev_info *dev_info);
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int pci_legacy_bridge_detect(struct pci_dev_info *dev_info);
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void pci_legacy_bridge_configure(struct pci_dev_info *dev_info,
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int io_block_num,
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int pci_interrupt_pin,
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int irq_number);
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#ifdef CONFIG_PCI_DEBUG
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extern void pci_show(struct pci_dev_info *dev_info);
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#else
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#define pci_show(__unused__) { ; }
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_DRIVERS_PCI_PCI_H_ */
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