zephyr/soc/st/stm32/stm32wbx/soc.c

48 lines
1013 B
C

/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief System/hardware module for STM32WB processor
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/logging/log.h>
#include <stm32_ll_system.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);
extern void stm32_pm_init(void);
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
*/
void soc_early_init_hook(void)
{
/* Enable the ART Accelerator I-cache, D-cache and prefetch */
LL_FLASH_EnableInstCache();
LL_FLASH_EnableDataCache();
LL_FLASH_EnablePrefetch();
/* Update CMSIS SystemCoreClock variable (HCLK) */
/* At reset, system core clock is set to 4 MHz from MSI */
SystemCoreClock = 4000000;
/* Set C2 Power Mode to shutdown */
/* It will be updated by C2 when required */
LL_C2_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN);
#if CONFIG_PM
stm32_pm_init();
#endif
}