145 lines
3.4 KiB
C
145 lines
3.4 KiB
C
/*
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* Copyright (c) 2019 STMicroelectronics.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/pm/pm.h>
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#include <soc.h>
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#include <zephyr/init.h>
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#include <stm32wbxx_ll_utils.h>
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#include <stm32wbxx_ll_bus.h>
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#include <stm32wbxx_ll_cortex.h>
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#include <stm32wbxx_ll_pwr.h>
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#include <stm32wbxx_ll_rcc.h>
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#include <clock_control/clock_stm32_ll_common.h>
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#include "stm32_hsem.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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/*
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* @brief Switch the system clock on HSI
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* @param none
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* @retval none
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*/
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static void switch_on_hsi(void)
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{
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LL_RCC_HSI_Enable();
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while (!LL_RCC_HSI_IsReady()) {
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}
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
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LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
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while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {
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}
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}
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static void lpm_hsem_lock(void)
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{
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/* Implementation of STM32 AN5289 algorithm to enter/exit lowpower */
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z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_WAIT_FOREVER);
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if (!LL_HSEM_1StepLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID)) {
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if (LL_PWR_IsActiveFlag_C2DS()) {
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/* Release ENTRY_STOP_MODE semaphore */
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
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/* The switch on HSI before entering Stop Mode is required */
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switch_on_hsi();
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}
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} else {
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/* The switch on HSI before entering Stop Mode is required */
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switch_on_hsi();
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}
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}
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/* Invoke Low Power/System Off specific Tasks */
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void pm_state_set(enum pm_state state, uint8_t substate_id)
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{
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if (state == PM_STATE_SUSPEND_TO_IDLE) {
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lpm_hsem_lock();
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/* ensure HSI is the wake-up system clock */
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LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
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switch (substate_id) {
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case 1:
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/* enter STOP0 mode */
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LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0);
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break;
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case 2:
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/* enter STOP1 mode */
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LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1);
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break;
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case 3:
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/* enter STOP2 mode */
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LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2);
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break;
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default:
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/* Release RCC semaphore */
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z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
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LOG_DBG("Unsupported power substate-id %u", substate_id);
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return;
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}
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/* Release RCC semaphore */
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z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
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LL_LPM_EnableDeepSleep();
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/* enter SLEEP mode : WFE or WFI */
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k_cpu_idle();
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} else {
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LOG_DBG("Unsupported power state %u", state);
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return;
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}
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}
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/* Handle SOC specific activity after Low Power Mode Exit */
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void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
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{
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/* Implementation of STM32 AN5289 algorithm to enter/exit lowpower */
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/* Release ENTRY_STOP_MODE semaphore */
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
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z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_WAIT_FOREVER);
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if (state != PM_STATE_SUSPEND_TO_IDLE) {
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LOG_DBG("Unsupported power state %u", state);
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} else {
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switch (substate_id) {
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case 1: /* STOP0 */
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__fallthrough;
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case 2: /* STOP1 */
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__fallthrough;
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case 3: /* STOP2 */
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LL_LPM_DisableSleepOnExit();
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LL_LPM_EnableSleep();
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break;
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default:
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LOG_DBG("Unsupported power substate-id %u",
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substate_id);
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break;
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}
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/* need to restore the clock */
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stm32_clock_control_init(NULL);
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}
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/* Release RCC semaphore */
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z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
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/*
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* System is now in active mode.
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* Reenable interrupts which were disabled
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* when OS started idling code.
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*/
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irq_unlock(0);
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}
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/* Initialize STM32 Power */
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void stm32_pm_init(void)
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{
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}
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