Daniel DeGrasse 5dfd3c3786 soc: rt10xx: Set divisor for sys pll (PLL2) PFD0 ... Divisor must be set to calculate SD host controller clock frequency in clock driver. Fixes #42380 Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>		2022-02-02 16:59:30 +01:00
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mcimx6x_m4	…
mcimx7_m4	…
mimx8ml8_m7	soc: remove unnecessary inclusions of devicetree.h	2022-01-11 11:52:27 +01:00
mimx8mm6_m4	…
mimx8mq6_m4	soc: arm: nxp_imx: Add i.MX8MQ SoC support	2021-12-17 09:23:38 -06:00
rt	soc: rt10xx: Set divisor for sys pll (PLL2) PFD0	2022-02-02 16:59:30 +01:00
rt5xx	soc: Add support for MXRT595	2022-01-19 13:35:09 -06:00
rt6xx	arm: remove @return doc for void functions	2022-01-12 16:02:16 -05:00
CMakeLists.txt	…
Kconfig	soc: Add support for MXRT595	2022-01-19 13:35:09 -06:00
Kconfig.defconfig	…
Kconfig.soc	…