Carlo Caione 10061efdc4 riscv: Rework and cleanup Kconfig ... This patch is doing several things: - Core ISA and extension Kconfig symbols have now a formalized name (CONFIG_RISCV_ISA_* and CONFIG_RISCV_ISA_EXT_*) - a new Kconfig.isa file was introduced with the full set of extensions currently supported by the v2.2 spec - a new Kconfig.core file was introduced to host all the RISCV cores (currently only E31) - ISA and extensions settings are moved to SoC configuration files Signed-off-by: Carlo Caione <ccaione@baylibre.com>		2022-06-05 14:28:42 +02:00
..
CMakeLists.txt	espi: it8xxx2: enable configuration of Chromebook	2022-02-21 22:01:48 -05:00
Kconfig.defconfig.series	ITE: drivers/pinmux: Remove it8xxx2 pinmux driver	2022-05-06 11:32:40 +02:00
Kconfig.series	riscv: Rework and cleanup Kconfig	2022-06-05 14:28:42 +02:00
Kconfig.soc	riscv: Rework and cleanup Kconfig	2022-06-05 14:28:42 +02:00
h2ram.ld	everywhere: fix typos	2022-03-18 13:24:08 -04:00
linker.ld	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
soc.c	soc: migrate includes to <zephyr/...>	2022-05-06 19:57:59 +02:00
soc.h	it8xxx2: changing PLL sequence is high priority	2022-02-21 21:00:55 -05:00