74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
/*
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* Copyright (c) 2023 Texas Instruments Incorporated
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/arch/cpu.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <soc.h>
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#define ADDR_TRANSLATE_RAT_BASE_ADDR (0x044200000u)
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#define PINCTRL_BASE_ADDR (0x4080000u)
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#define KICK0_UNLOCK_VAL (0x68EF3490U)
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#define KICK1_UNLOCK_VAL (0xD172BC5AU)
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#define CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET (0x1008)
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#define CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET (0x5008)
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static struct address_trans_region_config am6x_region_config[] = {
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{
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.system_addr = 0x0u,
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.local_addr = 0x80000000u,
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.size = address_trans_region_size_512M,
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},
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{
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.local_addr = 0xA0000000u,
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.system_addr = 0x20000000u,
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.size = address_trans_region_size_512M,
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},
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{
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.local_addr = 0xC0000000u,
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.system_addr = 0x40000000u,
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.size = address_trans_region_size_512M,
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},
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{
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.local_addr = 0x60000000u,
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.system_addr = 0x60000000u,
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.size = address_trans_region_size_512M,
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},
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/*
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* Add regions here if you want to map more memory.
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*/
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};
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static void am6x_mmr_unlock(void)
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{
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uint32_t baseAddr = PINCTRL_BASE_ADDR;
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uintptr_t kickAddr;
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/* Lock 0 */
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kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET;
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sys_write32(KICK0_UNLOCK_VAL, kickAddr); /* KICK 0 */
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kickAddr = kickAddr + sizeof(uint32_t *);
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sys_write32(KICK1_UNLOCK_VAL, kickAddr); /* KICK 1 */
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/* Lock 1 */
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kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET;
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sys_write32(KICK0_UNLOCK_VAL, kickAddr); /* KICK 0 */
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kickAddr = kickAddr + sizeof(uint32_t *);
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sys_write32(KICK1_UNLOCK_VAL, kickAddr); /* KICK 1 */
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}
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static int am6x_m4_init(void)
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{
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sys_mm_drv_ti_rat_init(am6x_region_config, ADDR_TRANSLATE_RAT_BASE_ADDR,
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ARRAY_SIZE(am6x_region_config));
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am6x_mmr_unlock();
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return 0;
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}
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SYS_INIT(am6x_m4_init, EARLY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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