52 lines
1.2 KiB
Plaintext
52 lines
1.2 KiB
Plaintext
# Copyright (c) 2022 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_DA1469X
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config SMARTBOND_TIMER
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default y if PM && !$(dt_nodelabel_enabled,timer2)
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config CORTEX_M_SYSTICK
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default n if SMARTBOND_TIMER
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config NUM_IRQS
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default 40
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DT_LPCLK_PATH := $(dt_nodelabel_path,lp_clk)
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DT_CLOCK_SRC_PATH := $(dt_node_ph_prop_path,$(DT_LPCLK_PATH),clock-src)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if CORTEX_M_SYSTICK
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default $(dt_node_int_prop_int,$(DT_CLOCK_SRC_PATH),clock-frequency) if SMARTBOND_TIMER
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config SYS_CLOCK_TICKS_PER_SEC
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default $(dt_node_int_prop_int,$(DT_CLOCK_SRC_PATH),clock-frequency) if SMARTBOND_TIMER
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config SRAM_VECTOR_TABLE
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default y
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config USE_DT_CODE_PARTITION
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default y if MCUBOOT
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config FLASH_BASE_ADDRESS
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
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config FLASH_LOAD_OFFSET
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default 0x2400 if !USE_DT_CODE_PARTITION
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# Enable sleep and voltage rails manager so that
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# the device consumes the lowest possible current
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config PM
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default y
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config PM_DEVICE
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default y
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config REGULATOR
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default y
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config PM_DEVICE_RUNTIME_EXCLUSIVE
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default n if PM_DEVICE_RUNTIME
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endif # SOC_SERIES_DA1469X
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