64 lines
1.8 KiB
C
64 lines
1.8 KiB
C
/*
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* Copyright (c) 2019 Interay Solutions B.V.
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* Copyright (c) 2019 Oane Kingma
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/init.h>
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#include "board.h"
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/sys/printk.h>
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#include "em_cmu.h"
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static int efm32gg_stk3701a_init(void)
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{
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#ifdef CONFIG_ETH_GECKO
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const struct device *cur_dev;
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/* Enable the ethernet PHY power */
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cur_dev = DEVICE_DT_GET(ETH_PWR_ENABLE_GPIO_NODE);
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if (!device_is_ready(cur_dev)) {
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printk("Ethernet PHY power gpio port is not ready!\n");
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return -ENODEV;
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}
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gpio_pin_configure(cur_dev, ETH_PWR_ENABLE_GPIO_PIN, GPIO_OUTPUT);
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gpio_pin_set(cur_dev, ETH_PWR_ENABLE_GPIO_PIN, 1);
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/* Configure ethernet reference clock */
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cur_dev = DEVICE_DT_GET(ETH_REF_CLK_GPIO_NODE);
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if (!device_is_ready(cur_dev)) {
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printk("Ethernet reference clock gpio port is not ready!\n");
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return -ENODEV;
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}
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gpio_pin_configure(cur_dev, ETH_REF_CLK_GPIO_PIN, GPIO_OUTPUT);
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gpio_pin_set(cur_dev, ETH_REF_CLK_GPIO_PIN, 0);
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CMU_OscillatorEnable(cmuOsc_HFXO, true, true);
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/* enable CMU_CLK2 as RMII reference clock */
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CMU->CTRL |= CMU_CTRL_CLKOUTSEL2_HFXO;
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CMU->ROUTELOC0 = (CMU->ROUTELOC0 & ~_CMU_ROUTELOC0_CLKOUT2LOC_MASK) |
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(ETH_REF_CLK_LOCATION << _CMU_ROUTELOC0_CLKOUT2LOC_SHIFT);
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CMU->ROUTEPEN |= CMU_ROUTEPEN_CLKOUT2PEN;
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/* Release the ethernet PHY reset */
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cur_dev = DEVICE_DT_GET(ETH_RESET_GPIO_NODE);
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if (!device_is_ready(cur_dev)) {
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printk("Ethernet PHY reset gpio port is not ready!\n");
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return -ENODEV;
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}
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gpio_pin_configure(cur_dev, ETH_RESET_GPIO_PIN, GPIO_OUTPUT);
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gpio_pin_set(cur_dev, ETH_RESET_GPIO_PIN, 1);
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#endif /* CONFIG_ETH_GECKO */
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return 0;
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}
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/* needs to be done after GPIO driver init */
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SYS_INIT(efm32gg_stk3701a_init, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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