598 lines
14 KiB
Plaintext
598 lines
14 KiB
Plaintext
/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <nordic/nrf_common.dtsi>
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#include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
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#include <zephyr/dt-bindings/regulator/nrf5x.h>
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/delete-node/ &sw_pwm;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpuapp: cpu@0 {
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compatible = "arm,cortex-m33f";
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reg = <0>;
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device_type = "cpu";
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clock-frequency = <DT_FREQ_M(128)>;
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#address-cells = <1>;
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#size-cells = <1>;
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itm: itm@e0000000 {
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compatible = "arm,armv8m-itm";
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reg = <0xe0000000 0x1000>;
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swo-ref-frequency = <DT_FREQ_M(128)>;
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};
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};
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};
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clocks {
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lfxo: lfxo {
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compatible = "nordic,nrf-lfxo";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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hfxo: hfxo {
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compatible = "nordic,nrf-hfxo";
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#clock-cells = <0>;
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clock-frequency = <DT_FREQ_M(32)>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ficr: ficr@ffc000 {
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compatible = "nordic,nrf-ficr";
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reg = <0xffc000 0x1000>;
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#nordic,ficr-cells = <1>;
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};
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uicr: uicr@ffd000 {
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compatible = "nordic,nrf-uicr";
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reg = <0xffd000 0x1000>;
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};
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cpuapp_sram: memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(511)>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x20000000 0x7fc00>;
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};
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global_peripherals: peripheral@50000000 {
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ranges = <0x0 0x50000000 0x10000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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dppic00: dppic@42000 {
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compatible = "nordic,nrf-dppic";
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reg = <0x42000 0x808>;
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status = "disabled";
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};
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spi00: spi@4d000 {
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/*
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* This spi node can be either SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4d000 0x1000>;
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interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(32)>;
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easydma-maxcnt-bits = <16>;
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rx-delay-supported;
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rx-delay = <1>;
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status = "disabled";
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};
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uart00: uart@4d000 {
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compatible = "nordic,nrf-uarte";
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reg = <0x4d000 0x1000>;
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interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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endtx-stoptx-supported;
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frame-timeout-supported;
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};
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gpio2: gpio@50400 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x50400 0x300>;
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#gpio-cells = <2>;
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ngpios = <11>;
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status = "disabled";
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port = <2>;
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};
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timer00: timer@55000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x55000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(128)>;
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prescaler = <0>;
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};
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dppic10: dppic@82000 {
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compatible = "nordic,nrf-dppic";
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reg = <0x82000 0x808>;
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status = "disabled";
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};
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timer10: timer@85000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x85000 0x1000>;
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cc-num = <8>;
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max-bit-width = <32>;
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interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(32)>;
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prescaler = <0>;
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};
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egu10: egu@87000 {
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compatible = "nordic,nrf-egu";
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reg = <0x87000 0x1000>;
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interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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radio: radio@8a000 {
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compatible = "nordic,nrf-radio";
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reg = <0x8a000 0x1000>;
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interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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dfe-supported;
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ieee802154-supported;
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ble-2mbps-supported;
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ble-coded-phy-supported;
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ieee802154: ieee802154 {
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compatible = "nordic,nrf-ieee802154";
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status = "disabled";
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};
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/* Note: In the nRF Connect SDK the SoftDevice Controller
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* is added and set as the default Bluetooth Controller.
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*/
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bt_hci_controller: bt_hci_controller {
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compatible = "zephyr,bt-hci-ll-sw-split";
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status = "disabled";
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};
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};
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dppic20: dppic@c2000 {
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compatible = "nordic,nrf-dppic";
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reg = <0xc2000 0x808>;
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status = "disabled";
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};
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i2c20: i2c@c6000 {
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc6000 0x1000>;
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interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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zephyr,pm-device-runtime-auto;
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};
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spi20: spi@c6000 {
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/*
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* This spi node can be either SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc6000 0x1000>;
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interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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rx-delay-supported;
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rx-delay = <1>;
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status = "disabled";
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};
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uart20: uart@c6000 {
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compatible = "nordic,nrf-uarte";
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reg = <0xc6000 0x1000>;
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interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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endtx-stoptx-supported;
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frame-timeout-supported;
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};
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i2c21: i2c@c7000 {
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc7000 0x1000>;
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interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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zephyr,pm-device-runtime-auto;
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};
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spi21: spi@c7000 {
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/*
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* This spi node can be either SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc7000 0x1000>;
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interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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rx-delay-supported;
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rx-delay = <1>;
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status = "disabled";
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};
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uart21: uart@c7000 {
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compatible = "nordic,nrf-uarte";
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reg = <0xc7000 0x1000>;
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interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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endtx-stoptx-supported;
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frame-timeout-supported;
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};
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i2c22: i2c@c8000 {
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc8000 0x1000>;
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interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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zephyr,pm-device-runtime-auto;
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};
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spi22: spi@c8000 {
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/*
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* This spi node can be either SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc8000 0x1000>;
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interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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rx-delay-supported;
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rx-delay = <1>;
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status = "disabled";
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};
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uart22: uart@c8000 {
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compatible = "nordic,nrf-uarte";
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reg = <0xc8000 0x1000>;
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interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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endtx-stoptx-supported;
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frame-timeout-supported;
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};
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egu20: egu@c9000 {
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compatible = "nordic,nrf-egu";
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reg = <0xc9000 0x1000>;
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interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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timer20: timer@ca000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0xca000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer21: timer@cb000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0xcb000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer22: timer@cc000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0xcc000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer23: timer@cd000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0xcd000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer24: timer@ce000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0xce000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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pdm20: pdm@d0000 {
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compatible = "nordic,nrf-pdm";
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status = "disabled";
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reg = <0xd0000 0x1000>;
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interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>;
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};
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pdm21: pdm@d1000 {
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compatible = "nordic,nrf-pdm";
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status = "disabled";
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reg = <0xd1000 0x1000>;
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interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>;
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};
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pwm20: pwm@d2000 {
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compatible = "nordic,nrf-pwm";
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status = "disabled";
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reg = <0xd2000 0x1000>;
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interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>;
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#pwm-cells = <3>;
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};
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pwm21: pwm@d3000 {
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compatible = "nordic,nrf-pwm";
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status = "disabled";
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reg = <0xd3000 0x1000>;
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interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>;
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#pwm-cells = <3>;
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};
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pwm22: pwm@d4000 {
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compatible = "nordic,nrf-pwm";
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status = "disabled";
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reg = <0xd4000 0x1000>;
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interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>;
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#pwm-cells = <3>;
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};
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adc: adc@d5000 {
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compatible = "nordic,nrf-saadc";
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reg = <0xd5000 0x1000>;
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interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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nfct: nfct@d6000 {
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compatible = "nordic,nrf-nfct";
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reg = <0xd6000 0x1000>;
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interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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temp: temp@d7000 {
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compatible = "nordic,nrf-temp";
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reg = <0xd7000 0x1000>;
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interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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gpio1: gpio@d8200 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0xd8200 0x300>;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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port = <1>;
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gpiote-instance = <&gpiote20>;
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};
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gpiote20: gpiote@da000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0xda000 0x1000>;
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status = "disabled";
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instance = <20>;
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};
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qdec20: qdec@e0000 {
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compatible = "nordic,nrf-qdec";
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reg = <0xe0000 0x1000>;
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interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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qdec21: qdec@e1000 {
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compatible = "nordic,nrf-qdec";
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reg = <0xe1000 0x1000>;
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interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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grtc: grtc@e2000 {
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compatible = "nordic,nrf-grtc";
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reg = <0xe2000 0x1000>;
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cc-num = <12>;
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status = "disabled";
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};
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dppic30: dppic@102000 {
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compatible = "nordic,nrf-dppic";
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reg = <0x102000 0x808>;
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status = "disabled";
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};
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i2c30: i2c@104000 {
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x104000 0x1000>;
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interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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zephyr,pm-device-runtime-auto;
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};
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spi30: spi@104000 {
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/*
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* This spi node can be either SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x104000 0x1000>;
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interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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rx-delay-supported;
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rx-delay = <1>;
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status = "disabled";
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};
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uart30: uart@104000 {
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compatible = "nordic,nrf-uarte";
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reg = <0x104000 0x1000>;
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interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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endtx-stoptx-supported;
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frame-timeout-supported;
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};
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wdt30: watchdog@108000 {
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compatible = "nordic,nrf-wdt";
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reg = <0x108000 0x620>;
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interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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wdt31: watchdog@109000 {
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compatible = "nordic,nrf-wdt";
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reg = <0x109000 0x620>;
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interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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gpio0: gpio@10a000 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x10a000 0x300>;
|
|
#gpio-cells = <2>;
|
|
ngpios = <5>;
|
|
status = "disabled";
|
|
port = <0>;
|
|
gpiote-instance = <&gpiote30>;
|
|
};
|
|
|
|
gpiote30: gpiote@10c000 {
|
|
compatible = "nordic,nrf-gpiote";
|
|
reg = <0x10c000 0x1000>;
|
|
status = "disabled";
|
|
instance = <30>;
|
|
};
|
|
|
|
clock: clock@10e000 {
|
|
compatible = "nordic,nrf-clock";
|
|
reg = <0x10e000 0x1000>;
|
|
interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
};
|
|
|
|
regulators: regulator@120000 {
|
|
compatible = "nordic,nrf54l-regulators";
|
|
reg = <0x120000 0x1000>;
|
|
status = "disabled";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
vregmain: regulator@120600 {
|
|
compatible = "nordic,nrf5x-regulator";
|
|
reg = <0x120600 0x1>;
|
|
status = "disabled";
|
|
regulator-name = "VREGMAIN";
|
|
regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
|
|
};
|
|
};
|
|
};
|
|
|
|
rram_controller: rram-controller@5004e000 {
|
|
compatible = "nordic,rram-controller";
|
|
reg = <0x5004e000 0x1000>;
|
|
interrupts = <78 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
cpuapp_rram: rram@0 {
|
|
compatible = "soc-nv-flash";
|
|
reg = <0x0 DT_SIZE_K(2028)>;
|
|
erase-block-size = <4096>;
|
|
write-block-size = <16>;
|
|
};
|
|
};
|
|
|
|
cpuapp_ppb: cpuapp-ppb-bus {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
cpuapp_nvic: interrupt-controller@e000e100 {
|
|
#address-cells = <1>;
|
|
compatible = "arm,v8m-nvic";
|
|
reg = <0xe000e100 0xc00>;
|
|
arm,num-irq-priority-bits = <3>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
cpuapp_systick: timer@e000e010 {
|
|
compatible = "arm,armv8m-systick";
|
|
reg = <0xe000e010 0x10>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
};
|