zephyr/drivers/entropy/Kconfig.stm32

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# STM32 entropy generator driver configuration
# Copyright (c) 2017 Erwin Rol <erwin@erwinrol.com>
# SPDX-License-Identifier: Apache-2.0
menuconfig ENTROPY_STM32_RNG
bool "STM32 RNG driver"
default y
depends on DT_HAS_ST_STM32_RNG_ENABLED
select ENTROPY_HAS_DRIVER
select USE_STM32_LL_RNG
help
This option enables the RNG processor, which is a entropy number
generator, based on a continuous analog noise, that provides
a entropy 32-bit value to the host when read. It is available for
F4 (except STM32F401 & STM32F411), L4, F7, H7 and G4 series.
if ENTROPY_STM32_RNG
config ENTROPY_STM32_THR_POOL_SIZE
int "Thread-mode random number pool size"
range ENTROPY_STM32_THR_THRESHOLD 256
default 8
help
Buffer length in bytes used to store entropy bytes generated by the
hardware to make them ready for thread mode consumers.
Please note, that size of the pool must be a power of 2.
config ENTROPY_STM32_THR_THRESHOLD
int "Thread-mode random number pool low-water threshold"
range 4 255
help
Low water-mark threshold in bytes to trigger entropy generation for
thread mode consumers. As soon as the number of available bytes in the
buffer goes below this number hardware entropy generation will be
started.
config ENTROPY_STM32_ISR_POOL_SIZE
int "ISR-mode random number pool size"
range ENTROPY_STM32_ISR_THRESHOLD 256
default 16
help
Buffer length in bytes used to store entropy bytes generated by the
hardware to make them ready for ISR consumers.
Please note, that size of the pool must be a power of 2.
config ENTROPY_STM32_ISR_THRESHOLD
int "ISR-mode random number pool low-water threshold"
range 12 255
help
Low water-mark threshold in bytes to trigger entropy generation for
ISR consumers. As soon as the number of available bytes in the
buffer goes below this number hardware entropy generation will be
started.
config ENTROPY_STM32_CLK_CHECK
bool "Runtime clock configuration check"
default y
help
Enables a check on RNG clock configuration. Correct clock
configuration depends on STM32 series. Check reference manual if an
error is reported.
This check assumes CED (Clock Error Detected) bit is enabled (when
available, CED is enabeld by default). Disable this check if CED is
disabled.
endif # ENTROPY_STM32_RNG