90 lines
1.9 KiB
Plaintext
90 lines
1.9 KiB
Plaintext
/*
|
|
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
/*
|
|
* Derived from DTS extracted with:
|
|
*
|
|
* qemu-system-aarch64 -machine virt -cpu cortex-a53 -nographic
|
|
* -machine dumpdtb=virt.dtb
|
|
*
|
|
* dtc -I dtb -O dts virt.dtb
|
|
*/
|
|
|
|
#include <mem.h>
|
|
#include <arm/armv8-a.dtsi>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
/ {
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a53";
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
uartclk: apb-pclk {
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <24000000>;
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
soc {
|
|
interrupt-parent = <&gic>;
|
|
|
|
sram0: memory@40000000 {
|
|
compatible = "mmio-sram";
|
|
reg = <0x40000000 DT_SIZE_M(128)>;
|
|
};
|
|
|
|
gic: interrupt-controller@8000000 {
|
|
compatible = "arm,gic";
|
|
reg = <0x8000000 0x010000>,
|
|
<0x80a0000 0xf60000>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <4>;
|
|
label = "GIC";
|
|
status = "okay";
|
|
};
|
|
|
|
uart0: uart@9000000 {
|
|
compatible = "arm,pl011";
|
|
reg = <0x9000000 0x1000>;
|
|
status = "disabled";
|
|
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL 0>;
|
|
interrupt-names = "irq_0";
|
|
clocks = <&uartclk>;
|
|
label = "UART_0";
|
|
};
|
|
|
|
flash0: flash@0 {
|
|
compatible = "cfi-flash";
|
|
bank-width = <4>;
|
|
/* As this is pointed to by zephyr,flash we can only handle
|
|
* one value in the reg property, so we comment out the
|
|
* second flash bank for now
|
|
*/
|
|
reg = <0x0 DT_SIZE_M(64) /* 0x4000000 DT_SIZE_M(64) */>;
|
|
};
|
|
|
|
arch_timer: timer {
|
|
compatible = "arm,arm-timer";
|
|
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
|
|
IRQ_DEFAULT_PRIORITY>,
|
|
<GIC_PPI 14 IRQ_TYPE_LEVEL
|
|
IRQ_DEFAULT_PRIORITY>,
|
|
<GIC_PPI 11 IRQ_TYPE_LEVEL
|
|
IRQ_DEFAULT_PRIORITY>,
|
|
<GIC_PPI 10 IRQ_TYPE_LEVEL
|
|
IRQ_DEFAULT_PRIORITY>;
|
|
label = "arch_timer";
|
|
};
|
|
};
|
|
};
|