330 lines
7.4 KiB
Plaintext
330 lines
7.4 KiB
Plaintext
/*
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* Copyright (c) 2019 SEAL AG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/clock/kinetis_sim.h>
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#include <zephyr/dt-bindings/clock/kinetis_mcg.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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chosen {
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zephyr,flash-controller = &ftfe;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m7";
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reg = <0>;
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};
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};
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/* Dummy pinctrl node, filled with pin mux options at board level */
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pinctrl: pinctrl {
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compatible = "nxp,kinetis-pinctrl";
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status = "okay";
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};
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soc {
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mpu: mpu@4000d000 {
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compatible = "nxp,kinetis-mpu";
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reg = <0x4000d000 0x1000>;
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status = "disabled";
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};
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sim: sim@40047000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40047000 0x2000>;
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#clock-cells = <3>;
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core_clk {
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compatible = "fixed-factor-clock";
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clocks = <&mcg KINETIS_MCG_OUT_CLK>;
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clock-div = <1>;
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#clock-cells = <0>;
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};
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bus_clk {
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compatible = "fixed-factor-clock";
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clocks = <&mcg KINETIS_MCG_OUT_CLK>;
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clock-div = <2>;
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#clock-cells = <0>;
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};
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flexbus_clk {
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compatible = "fixed-factor-clock";
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clocks = <&mcg KINETIS_MCG_OUT_CLK>;
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clock-div = <4>;
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#clock-cells = <0>;
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};
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flash_clk {
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compatible = "fixed-factor-clock";
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clocks = <&mcg KINETIS_MCG_OUT_CLK>;
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clock-div = <10>;
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#clock-cells = <0>;
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};
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};
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mcg: clock-controller@40064000 {
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compatible = "nxp,kinetis-mcg";
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reg = <0x40064000 0x1000>;
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#clock-cells = <1>;
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};
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osc: clock-controller@40065000 {
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compatible = "nxp,kv58-osc";
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reg = <0x40065000 0x4>;
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enable-external-reference;
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};
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ftfe: flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfe";
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reg = <0x40020000 0x1000>;
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interrupts = <18 0>, <19 0>;
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interrupt-names = "command-complete", "read-collision";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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adc0: adc@4003b000 {
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x1000>;
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interrupts = <37 0>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff000 0x40>;
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interrupts = <59 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porta>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff040 0x40>;
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interrupts = <60 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portb>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff080 0x40>;
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interrupts = <61 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portc>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff0c0 0x40>;
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interrupts = <62 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portd>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff100 0x40>;
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interrupts = <63 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porte>;
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <24 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <25 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
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status = "disabled";
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};
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porta: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
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};
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portb: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
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};
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portc: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
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};
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portd: pinmux@4004c000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004c000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
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};
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porte: pinmux@4004d000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004d000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
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};
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ftm0: ftm@40038000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40038000 0x1000>;
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interrupts = <42 0>;
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prescaler = <16>;
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status = "disabled";
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};
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ftm1: ftm@40039000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40039000 0x1000>;
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interrupts = <43 0>;
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prescaler = <16>;
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status = "disabled";
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};
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ftm2: ftm@4003a000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x4003a000 0x1000>;
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interrupts = <53 0>;
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prescaler = <16>;
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status = "disabled";
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};
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ftm3: ftm@40026000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40026000 0x1000>;
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interrupts = <71 0>;
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prescaler = <16>;
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status = "disabled";
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};
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spi0: spi@4002c000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <26 3>;
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status = "disabled";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x103c 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@4002d000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002d000 0x1000>;
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interrupts = <27 3>;
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status = "disabled";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x103c 13>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi2: spi@400ac000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x400ac000 0x1000>;
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interrupts = <65 3>;
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status = "disabled";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1030 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: uart@4006a000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006a000 0x1000>;
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interrupts = <31 0>, <32 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 10>;
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status = "disabled";
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};
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uart1: uart@4006b000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006b000 0x1000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 11>;
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status = "disabled";
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};
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uart2: uart@4006c000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006c000 0x1000>;
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interrupts = <35 0>, <36 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 12>;
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status = "disabled";
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};
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uart3: uart@4006d000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006d000 0x1000>;
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interrupts = <44 0>, <45 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 13>;
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status = "disabled";
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};
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uart4: uart@400ea000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x400ea000 0x1000>;
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interrupts = <46 0>, <47 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1028 10>;
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status = "disabled";
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};
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uart5: uart@400eb000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x400eb000 0x1000>;
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interrupts = <28 0>, <29 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1028 11>;
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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