Peter Gielda f925af9c47 dts: riscv: Fix incorrect plic size ... Fix wrong size of the plic node dts entry. Signed-off-by: Peter Gielda <pgielda@antmicro.com>		2024-07-02 22:21:17 -04:00
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arc/synopsys	drivers: spi: dw: define max-xfer-size	2024-01-20 13:11:42 +01:00
arm	dts: pinctrl: unify pinctrl binding for imx8mp/n/m	2024-07-01 09:05:02 -04:00
arm64	dts: pinctrl: unify pinctrl binding for imx8mp/n/m	2024-07-01 09:05:02 -04:00
bindings	dts: bindings: cpu: add definition for arm,cortex-m55	2024-06-27 20:06:06 -04:00
common	dts: nordic: Align boards dts to new VEVIF, BELLBOARD nomenclature	2024-06-15 04:41:47 -04:00
nios2/intel	…
posix	…
riscv	dts: riscv: Fix incorrect plic size	2024-07-02 22:21:17 -04:00
sparc/gaisler	soc/gr716a: Enable SPIMCTRL support on LEON GR716A	2024-02-01 14:06:38 +01:00
x86/intel	dts: cleanup leading spaces	2024-06-21 08:46:12 -04:00
xtensa	dts: xtensa: intel: Remove non-existent power domains from ACE30 PTL DTS	2024-06-25 14:15:27 -04:00
Kconfig	…
binding-template.yaml	…