00b2ef8744
This commit makes the devicetrees of the targets that are based on the QEMU `virt` machine more consistent with the rest of the RISC-V targets in Zephyr by: * adding the `riscv,isa` property * adding a compatible string which uniquely identifies the `virt` core Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> |
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| .. | ||
| doc | ||
| Kconfig | ||
| Kconfig.defconfig | ||
| Kconfig.qemu_riscv32 | ||
| board.cmake | ||
| board.yml | ||
| qemu_riscv32.dts | ||
| qemu_riscv32.yaml | ||
| qemu_riscv32_defconfig | ||
| qemu_riscv32_qemu_virt_riscv32_smp.dts | ||
| qemu_riscv32_qemu_virt_riscv32_smp.yaml | ||
| qemu_riscv32_qemu_virt_riscv32_smp_defconfig | ||