317 lines
5.8 KiB
Plaintext
317 lines
5.8 KiB
Plaintext
/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nordic/nrf9280_cpuapp.dtsi>
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#include "nrf9280pdk_nrf9280-memory_map.dtsi"
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#include "nrf9280pdk_nrf9280-ipc_conf.dtsi"
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#include "nrf9280pdk_nrf9280-pinctrl.dtsi"
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/delete-node/ &cpurad_cpusys_ipc;
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/delete-node/ &cpusec_cpurad_ipc;
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/ {
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compatible = "nordic,nrf9280pdk_nrf9280-cpuapp";
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model = "Nordic nRF9280 DK nRF9280 Application MCU";
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chosen {
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zephyr,console = &uart136;
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zephyr,code-partition = &cpuapp_slot0_partition;
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zephyr,flash = &mram1x;
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zephyr,sram = &cpuapp_data;
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zephyr,shell-uart = &uart136;
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zephyr,ieee802154 = &cpuapp_ieee802154;
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zephyr,bt-hci = &bt_hci_ipc0;
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nordic,802154-spinel-ipc = &ipc0;
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zephyr,canbus = &can120;
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};
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aliases {
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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led3 = &led3;
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resetinfo = &cpuapp_resetinfo;
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pwm-led0 = &pwm_led0;
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sw0 = &button0;
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sw1 = &button1;
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sw2 = &button2;
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sw3 = &button3;
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ipc-to-cpusys = &cpuapp_cpusys_ipc;
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watchdog0 = &wdt010;
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};
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buttons {
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compatible = "gpio-keys";
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button0: button_0 {
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gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 0";
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zephyr,code = <INPUT_KEY_0>;
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};
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button1: button_1 {
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gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 1";
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zephyr,code = <INPUT_KEY_1>;
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};
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button2: button_2 {
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gpios = <&gpio0 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 2";
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zephyr,code = <INPUT_KEY_2>;
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};
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button3: button_3 {
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gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 3";
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zephyr,code = <INPUT_KEY_3>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led0: led_0 {
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gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
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label = "Green LED 0";
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};
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led1: led_1 {
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gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
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label = "Green LED 1";
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};
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led2: led_2 {
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gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
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label = "Green LED 2";
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};
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led3: led_3 {
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gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
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label = "Green LED 3";
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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/*
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* LEDs are connected to GPIO Port 9 - pins 2-5. There is no valid hardware
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* configuration to pass PWM signal on pins 0 and 1. First valid config is P9.2.
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* Signal on PWM130's channel 0 can be passed directly on GPIO Port 9 pin 2.
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*/
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pwm_led0: pwm_led_0 {
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pwms = <&pwm130 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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};
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};
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};
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&cpuapp_ram0x_region {
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status = "okay";
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};
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&cpuapp_cpurad_ram0x_region {
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status = "okay";
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};
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&cpuapp_cpucell_ipc_shm {
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status = "okay";
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};
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&cpucell_cpuapp_ipc_shm {
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status = "okay";
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};
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&shared_ram3x_region {
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status = "okay";
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};
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&ram21_region {
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status = "okay";
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};
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&cpuapp_bellboard {
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status = "okay";
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interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
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interrupt-names = "irq0";
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/* The following bells on this bellboard are rang by these cores
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* - Bell 0: cpusec
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* - Bell 6: cpusys
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* - Bell 13: cpuppr
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* - Bell 18: cpurad
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* - Bells 24, 25, 29, 31: cpucell
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*/
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nordic,interrupt-mapping = <0xA3042041 0>;
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};
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&cpurad_bellboard {
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status = "okay";
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};
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&cpucell_bellboard {
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status = "okay";
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};
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&cpusys_vevif {
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status = "okay";
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};
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&cpusec_cpuapp_ipc {
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mbox-names = "tx", "rx";
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tx-region = <&cpuapp_cpusec_ipc_shm>;
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rx-region = <&cpusec_cpuapp_ipc_shm>;
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};
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ipc0: &cpuapp_cpurad_ipc {
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status = "okay";
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mbox-names = "rx", "tx";
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tx-region = <&cpuapp_cpurad_ipc_shm>;
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rx-region = <&cpurad_cpuapp_ipc_shm>;
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tx-blocks = <32>;
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rx-blocks = <32>;
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bt_hci_ipc0: bt_hci_ipc0 {
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compatible = "zephyr,bt-hci-ipc";
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status = "okay";
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};
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};
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&cpuapp_cpusys_ipc {
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status = "okay";
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mbox-names = "rx", "tx";
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tx-region = <&cpuapp_cpusys_ipc_shm>;
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rx-region = <&cpusys_cpuapp_ipc_shm>;
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};
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&cpuapp_cpuppr_ipc {
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mbox-names = "rx", "tx";
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tx-region = <&cpuapp_cpuppr_ipc_shm>;
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rx-region = <&cpuppr_cpuapp_ipc_shm>;
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};
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&cpuapp_dma_region {
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status = "okay";
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};
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&dma_fast_region {
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status = "okay";
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};
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&cpuapp_rx_partitions {
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status = "okay";
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};
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&cpuapp_rw_partitions {
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status = "okay";
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};
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&cpuppr_vpr {
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execution-memory = <&cpuppr_code_data>;
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source-memory = <&cpuppr_code_partition>;
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};
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&gpiote130 {
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status = "okay";
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owned-channels = <0 1 2 3 4 5 6 7>;
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};
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&gpio0 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio9 {
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status = "okay";
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};
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&grtc {
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status = "okay";
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child-owned-channels = <5 6>;
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nonsecure-channels = <5 6>;
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owned-channels = <4 5 6>;
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};
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&uart135 {
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current-speed = <115200>;
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pinctrl-0 = <&uart135_default>;
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pinctrl-1 = <&uart135_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&uart136 {
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status = "okay";
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memory-regions = <&cpuapp_dma_region>;
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current-speed = <115200>;
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pinctrl-0 = <&uart136_default>;
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pinctrl-1 = <&uart136_sleep>;
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pinctrl-names = "default", "sleep";
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hw-flow-control;
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};
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&gpio6 {
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status = "okay";
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};
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&exmif {
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cs-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&exmif_default>;
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pinctrl-names = "default";
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status = "okay";
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mx25uw63: mx25uw6345g@0 {
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compatible = "jedec,spi-nor";
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status = "disabled";
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reg = <0>;
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spi-max-frequency = <DT_FREQ_M(48)>;
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jedec-id = [c2 84 37];
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sfdp-bfp = [
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e5 20 8a ff ff ff ff 03 00 ff 00 ff 00 ff 00 ff
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ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 10 d8
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00 ff 00 ff 87 79 01 00 84 12 00 c4 cc 04 67 46
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30 b0 30 b0 f4 bd d5 5c 00 00 00 ff 10 10 00 20
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00 00 00 00 00 00 7c 23 48 00 00 00 00 00 88 88
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];
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size = <67108864>;
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has-dpd;
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t-enter-dpd = <10000>;
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t-exit-dpd = <30000>;
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};
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};
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&cpuapp_ieee802154 {
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status = "okay";
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};
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zephyr_udc0: &usbhs {
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status = "okay";
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};
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&canpll {
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status = "okay";
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};
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&can120 {
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status = "okay";
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pinctrl-0 = <&can120_default>;
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pinctrl-names = "default";
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};
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&pwm130 {
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status = "okay";
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pinctrl-0 = <&pwm130_default>;
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pinctrl-1 = <&pwm130_sleep>;
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pinctrl-names = "default", "sleep";
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memory-regions = <&cpuapp_dma_region>;
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};
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&adc {
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memory-regions = <&cpuapp_dma_region>;
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status = "okay";
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};
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