351 lines
8.5 KiB
C
351 lines
8.5 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT microchip_xec_timer
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/**
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* @file
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* @brief Microchip XEC Counter driver
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*
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* This is the driver for the 16/32-bit counters on the Microchip SoCs.
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*
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* Notes:
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* - The counters are running in down counting mode.
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* - Interrupts are triggered (if enabled) when the counter
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* reaches zero.
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* - These are not free running counters where there are separate
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* compare values for interrupts. When setting single shot alarms,
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* the counter values are changed so that interrupts are triggered
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* when the counters reach zero.
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*/
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#include <logging/log.h>
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LOG_MODULE_REGISTER(counter_mchp_xec, CONFIG_COUNTER_LOG_LEVEL);
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#include <drivers/counter.h>
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#include <soc.h>
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#include <errno.h>
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#include <stdbool.h>
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struct counter_xec_config {
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struct counter_config_info info;
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void (*config_func)(void);
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uint32_t base_address;
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uint16_t prescaler;
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uint8_t girq_id;
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uint8_t girq_bit;
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};
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struct counter_xec_data {
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counter_alarm_callback_t alarm_cb;
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counter_top_callback_t top_cb;
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void *user_data;
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};
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#define COUNTER_XEC_REG_BASE(_dev) \
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((BTMR_Type *) \
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((const struct counter_xec_config * const) \
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_dev->config_info)->base_address)
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#define COUNTER_XEC_CONFIG(_dev) \
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(((const struct counter_xec_config * const) \
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_dev->config_info))
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#define COUNTER_XEC_DATA(_dev) \
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((struct counter_xec_data *)dev->driver_data)
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static int counter_xec_start(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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if (counter->CTRL & MCHP_BTMR_CTRL_ENABLE) {
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return -EALREADY;
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}
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counter->CTRL |= (MCHP_BTMR_CTRL_ENABLE | MCHP_BTMR_CTRL_START);
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LOG_DBG("%p Counter started", dev);
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return 0;
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}
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static int counter_xec_stop(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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uint32_t reg;
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if (!(counter->CTRL & MCHP_BTMR_CTRL_ENABLE)) {
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/* Already stopped, nothing to do */
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return 0;
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}
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reg = counter->CTRL;
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reg &= ~MCHP_BTMR_CTRL_ENABLE;
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reg &= ~MCHP_BTMR_CTRL_START;
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reg &= ~MCHP_BTMR_CTRL_HALT;
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reg &= ~MCHP_BTMR_CTRL_RELOAD;
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reg &= ~MCHP_BTMR_CTRL_AUTO_RESTART;
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counter->CTRL = reg;
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counter->IEN = MCHP_BTMR_INTDIS;
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counter->CNT = counter->PRLD;
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LOG_DBG("%p Counter stopped", dev);
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return 0;
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}
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static int counter_xec_get_value(struct device *dev, uint32_t *ticks)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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*ticks = counter->CNT;
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return 0;
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}
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static int counter_xec_set_alarm(struct device *dev, uint8_t chan_id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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struct counter_xec_data *data = COUNTER_XEC_DATA(dev);
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if (chan_id != 0) {
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LOG_ERR("Invalid channel id %u", chan_id);
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return -ENOTSUP;
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}
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/* Interrupts are only triggered when the counter reaches 0.
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* So only relative alarms are supported.
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*/
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if (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) {
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return -ENOTSUP;
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}
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if (data->alarm_cb != NULL) {
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return -EBUSY;
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}
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if (!alarm_cfg->callback) {
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return -EINVAL;
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}
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if (alarm_cfg->ticks > counter->PRLD) {
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return -EINVAL;
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}
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counter->CNT = alarm_cfg->ticks;
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data->alarm_cb = alarm_cfg->callback;
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data->user_data = alarm_cfg->user_data;
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counter->IEN = MCHP_BTMR_INTEN;
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LOG_DBG("%p Counter alarm set to %u ticks", dev, alarm_cfg->ticks);
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counter->CTRL |= MCHP_BTMR_CTRL_START;
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return 0;
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}
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static int counter_xec_cancel_alarm(struct device *dev, uint8_t chan_id)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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struct counter_xec_data *data = COUNTER_XEC_DATA(dev);
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if (chan_id != 0) {
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LOG_ERR("Invalid channel id %u", chan_id);
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return -ENOTSUP;
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}
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counter->CTRL &= ~MCHP_BTMR_CTRL_START;
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counter->IEN = MCHP_BTMR_INTDIS;
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data->alarm_cb = NULL;
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data->user_data = NULL;
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LOG_DBG("%p Counter alarm canceled", dev);
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return 0;
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}
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static uint32_t counter_xec_get_pending_int(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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return counter->STS;
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}
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static uint32_t counter_xec_get_top_value(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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return counter->PRLD;
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}
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static int counter_xec_set_top_value(struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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const struct counter_xec_config *counter_cfg = COUNTER_XEC_CONFIG(dev);
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struct counter_xec_data *data = COUNTER_XEC_DATA(dev);
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int ret = 0;
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bool restart;
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if (data->alarm_cb) {
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return -EBUSY;
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}
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if (cfg->ticks > counter_cfg->info.max_top_value) {
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return -EINVAL;
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}
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restart = ((counter->CTRL & MCHP_BTMR_CTRL_START) != 0U);
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counter->CTRL &= ~MCHP_BTMR_CTRL_START;
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if (cfg->flags & COUNTER_TOP_CFG_DONT_RESET) {
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if (counter->CNT > cfg->ticks) {
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ret = -ETIME;
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if (cfg->flags & COUNTER_TOP_CFG_RESET_WHEN_LATE) {
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counter->CNT = cfg->ticks;
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}
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}
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} else {
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counter->CNT = cfg->ticks;
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}
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counter->PRLD = cfg->ticks;
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data->top_cb = cfg->callback;
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data->user_data = cfg->user_data;
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if (data->top_cb) {
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counter->IEN = MCHP_BTMR_INTEN;
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counter->CTRL |= MCHP_BTMR_CTRL_AUTO_RESTART;
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} else {
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counter->IEN = MCHP_BTMR_INTDIS;
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counter->CTRL &= ~MCHP_BTMR_CTRL_AUTO_RESTART;
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}
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LOG_DBG("%p Counter top value was set to %u", dev, cfg->ticks);
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if (restart) {
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counter->CTRL |= MCHP_BTMR_CTRL_START;
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}
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return ret;
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}
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static uint32_t counter_xec_get_max_relative_alarm(struct device *dev)
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{
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const struct counter_xec_config *counter_cfg = COUNTER_XEC_CONFIG(dev);
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return counter_cfg->info.max_top_value;
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}
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static void counter_xec_isr(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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const struct counter_xec_config *counter_cfg = COUNTER_XEC_CONFIG(dev);
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struct counter_xec_data *data = COUNTER_XEC_DATA(dev);
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counter_alarm_callback_t alarm_cb;
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void *user_data;
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counter->STS = MCHP_BTMR_STS_ACTIVE;
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MCHP_GIRQ_SRC(counter_cfg->girq_id) = BIT(counter_cfg->girq_bit);
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LOG_DBG("%p Counter ISR", dev);
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if (data->alarm_cb) {
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/* Alarm is one-shot, so disable interrupt and callback */
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counter->IEN = MCHP_BTMR_INTDIS;
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alarm_cb = data->alarm_cb;
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data->alarm_cb = NULL;
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user_data = data->user_data;
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alarm_cb(dev, 0, counter->CNT, user_data);
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} else if (data->top_cb) {
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data->top_cb(dev, data->user_data);
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}
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}
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static const struct counter_driver_api counter_xec_api = {
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.start = counter_xec_start,
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.stop = counter_xec_stop,
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.get_value = counter_xec_get_value,
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.set_alarm = counter_xec_set_alarm,
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.cancel_alarm = counter_xec_cancel_alarm,
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.set_top_value = counter_xec_set_top_value,
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.get_pending_int = counter_xec_get_pending_int,
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.get_top_value = counter_xec_get_top_value,
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.get_max_relative_alarm = counter_xec_get_max_relative_alarm,
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};
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static int counter_xec_init(struct device *dev)
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{
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BTMR_Type *counter = COUNTER_XEC_REG_BASE(dev);
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const struct counter_xec_config *counter_cfg = COUNTER_XEC_CONFIG(dev);
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counter_xec_stop(dev);
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counter->CTRL &= ~MCHP_BTMR_CTRL_COUNT_UP;
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counter->CTRL |= (counter_cfg->prescaler << MCHP_BTMR_CTRL_PRESCALE_POS) &
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MCHP_BTMR_CTRL_PRESCALE_MASK;
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/* Set preload and actually pre-load the counter */
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counter->PRLD = counter_cfg->info.max_top_value;
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counter->CNT = counter_cfg->info.max_top_value;
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MCHP_GIRQ_ENSET(counter_cfg->girq_id) = BIT(counter_cfg->girq_bit);
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counter_cfg->config_func();
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return 0;
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}
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#define COUNTER_XEC_INIT(inst) \
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static void counter_xec_irq_config_##inst(void); \
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\
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static struct counter_xec_data counter_xec_dev_data_##inst; \
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\
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static struct counter_xec_config counter_xec_dev_config_##inst = { \
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.info = { \
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.max_top_value = DT_INST_PROP(inst, max_value), \
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.freq = DT_INST_PROP(inst, clock_frequency) / \
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(1 << DT_INST_PROP(inst, prescaler)), \
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.flags = 0, \
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.channels = 1, \
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}, \
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\
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.config_func = counter_xec_irq_config_##inst, \
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.base_address = DT_INST_REG_ADDR(inst), \
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.prescaler = DT_INST_PROP(inst, prescaler), \
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.girq_id = DT_INST_PROP(inst, girq), \
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.girq_bit = DT_INST_PROP(inst, girq_bit), \
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}; \
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\
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DEVICE_AND_API_INIT(counter_xec_##inst, DT_INST_LABEL(inst), \
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counter_xec_init, \
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&counter_xec_dev_data_##inst, \
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&counter_xec_dev_config_##inst, \
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POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&counter_xec_api); \
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\
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static void counter_xec_irq_config_##inst(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(inst), \
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DT_INST_IRQ(inst, priority), \
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counter_xec_isr, \
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DEVICE_GET(counter_xec_##inst), 0); \
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irq_enable(DT_INST_IRQN(inst)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(COUNTER_XEC_INIT)
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