zephyr/boards/riscv/qemu_riscv32
Wentong Wu 589a0c22ff boards: qemu_riscv32: enable icount mode
Enable icount mode for qemu_riscv32 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-05-14 13:52:07 +02:00
..
doc
Kconfig.board tests: fp_sharing: Enable build-only tests for RISC-V QEMU platform 2020-04-22 16:39:48 -07:00
Kconfig.defconfig
board.cmake boards: qemu_riscv32: enable icount mode 2020-05-14 13:52:07 +02:00
qemu_riscv32.dts
qemu_riscv32.yaml
qemu_riscv32_defconfig kconfig: Remove assignments to CONFIG_<arch> syms and hide them 2020-02-08 00:50:08 -06:00