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https://github.com/zephyrproject-rtos/zephyr.git
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315 lines
9.4 KiB
Python
Executable File
315 lines
9.4 KiB
Python
Executable File
#!/usr/bin/env python3
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#
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# Copyright (c) 2017 Intel Corporation
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#
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# SPDX-License-Identifier: Apache-2.0
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"""Generate Interrupt Descriptor Table for x86 CPUs.
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This script generates the interrupt descriptor table (IDT) for x86.
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Please consult the IA Architecture SW Developer Manual, volume 3,
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for more details on this data structure.
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This script accepts as input the zephyr_prebuilt.elf binary,
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which is a link of the Zephyr kernel without various build-time
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generated data structures (such as the IDT) inserted into it.
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This kernel image has been properly padded such that inserting
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these data structures will not disturb the memory addresses of
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other symbols. From the kernel binary we read a special section
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"intList" which contains the desired interrupt routing configuration
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for the kernel, populated by instances of the IRQ_CONNECT() macro.
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This script outputs three binary tables:
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1. The interrupt descriptor table itself.
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2. A bitfield indicating which vectors in the IDT are free for
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installation of dynamic interrupts at runtime.
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3. An array which maps configured IRQ lines to their associated
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vector entries in the IDT, used to program the APIC at runtime.
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"""
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import argparse
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import sys
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import struct
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import os
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import elftools
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from distutils.version import LooseVersion
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from elftools.elf.elffile import ELFFile
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from elftools.elf.sections import SymbolTableSection
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if LooseVersion(elftools.__version__) < LooseVersion('0.24'):
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sys.exit("pyelftools is out of date, need version 0.24 or later")
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# This will never change, first selector in the GDT after the null selector
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KERNEL_CODE_SEG = 0x08
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# These exception vectors push an error code onto the stack.
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ERR_CODE_VECTORS = [8, 10, 11, 12, 13, 14, 17]
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def debug(text):
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if not args.verbose:
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return
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sys.stdout.write(os.path.basename(sys.argv[0]) + ": " + text + "\n")
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def error(text):
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sys.exit(os.path.basename(sys.argv[0]) + ": " + text)
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# See Section 6.11 of the Intel Architecture Software Developer's Manual
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gate_desc_format = "<HHBBH"
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def create_irq_gate(handler, dpl):
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present = 1
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gate_type = 0xE # 32-bit interrupt gate
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type_attr = gate_type | (dpl << 5) | (present << 7)
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offset_hi = handler >> 16
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offset_lo = handler & 0xFFFF
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data = struct.pack(gate_desc_format, offset_lo, KERNEL_CODE_SEG, 0,
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type_attr, offset_hi)
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return data
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def create_task_gate(tss, dpl):
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present = 1
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gate_type = 0x5 # 32-bit task gate
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type_attr = gate_type | (dpl << 5) | (present << 7)
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data = struct.pack(gate_desc_format, 0, tss, 0, type_attr, 0)
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return data
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def create_idt_binary(idt_config, filename):
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with open(filename, "wb") as fp:
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for handler, tss, dpl in idt_config:
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if handler and tss:
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error("entry specifies both handler function and tss")
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if not handler and not tss:
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error("entry does not specify either handler or tss")
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if handler:
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data = create_irq_gate(handler, dpl)
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else:
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data = create_task_gate(tss, dpl)
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fp.write(data)
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map_fmt = "<B"
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def create_irq_vec_map_binary(irq_vec_map, filename):
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with open(filename, "wb") as fp:
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for i in irq_vec_map:
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fp.write(struct.pack(map_fmt, i))
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def priority_range(prio):
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# Priority levels are represented as groups of 16 vectors within the IDT
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base = 32 + (prio * 16)
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return range(base, base + 16)
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def update_irq_vec_map(irq_vec_map, irq, vector, max_irq):
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# No IRQ associated; exception or software interrupt
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if irq == -1:
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return
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if irq >= max_irq:
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error("irq %d specified, but CONFIG_MAX_IRQ_LINES is %d" %
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(irq, max_irq))
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# This table will never have values less than 32 since those are for
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# exceptions; 0 means unconfigured
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if irq_vec_map[irq] != 0:
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error("multiple vector assignments for interrupt line %d" % irq)
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debug("assign IRQ %d to vector %d" % (irq, vector))
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irq_vec_map[irq] = vector
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def setup_idt(spur_code, spur_nocode, intlist, max_vec, max_irq):
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irq_vec_map = [0 for i in range(max_irq)]
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vectors = [None for i in range(max_vec)]
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# Pass 1: sanity check and set up hard-coded interrupt vectors
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for handler, irq, prio, vec, dpl, tss in intlist:
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if vec == -1:
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if prio == -1:
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error("entry does not specify vector or priority level")
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continue
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if vec >= max_vec:
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error("Vector %d specified, but size of IDT is only %d vectors" %
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(vec, max_vec))
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if vectors[vec] is not None:
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error("Multiple assignments for vector %d" % vec)
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vectors[vec] = (handler, tss, dpl)
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update_irq_vec_map(irq_vec_map, irq, vec, max_irq)
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# Pass 2: set up priority-based interrupt vectors
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for handler, irq, prio, vec, dpl, tss in intlist:
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if vec != -1:
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continue
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for vi in priority_range(prio):
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if vi >= max_vec:
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break
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if vectors[vi] is None:
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vec = vi
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break
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if vec == -1:
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error("can't find a free vector in priority level %d" % prio)
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vectors[vec] = (handler, tss, dpl)
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update_irq_vec_map(irq_vec_map, irq, vec, max_irq)
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# Pass 3: fill in unused vectors with spurious handler at dpl=0
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for i in range(max_vec):
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if vectors[i] is not None:
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continue
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if i in ERR_CODE_VECTORS:
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handler = spur_code
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else:
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handler = spur_nocode
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vectors[i] = (handler, 0, 0)
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return vectors, irq_vec_map
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def get_symbols(obj):
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for section in obj.iter_sections():
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if isinstance(section, SymbolTableSection):
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return {sym.name: sym.entry.st_value
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for sym in section.iter_symbols()}
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raise LookupError("Could not find symbol table")
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# struct genidt_header_s {
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# uint32_t spurious_addr;
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# uint32_t spurious_no_error_addr;
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# int32_t num_entries;
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# };
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intlist_header_fmt = "<II"
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# struct genidt_entry_s {
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# uint32_t isr;
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# int32_t irq;
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# int32_t priority;
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# int32_t vector_id;
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# int32_t dpl;
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# int32_t tss;
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# };
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intlist_entry_fmt = "<Iiiiii"
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def get_intlist(elf):
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intdata = elf.get_section_by_name("intList").data()
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header_sz = struct.calcsize(intlist_header_fmt)
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header = struct.unpack_from(intlist_header_fmt, intdata, 0)
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intdata = intdata[header_sz:]
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spurious_code = header[0]
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spurious_nocode = header[1]
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debug("spurious handler (code) : %s" % hex(header[0]))
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debug("spurious handler (no code) : %s" % hex(header[1]))
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intlist = [i for i in
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struct.iter_unpack(intlist_entry_fmt, intdata)]
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debug("Configured interrupt routing")
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debug("handler irq pri vec dpl")
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debug("--------------------------")
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for irq in intlist:
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debug("{0:<10} {1:<3} {2:<3} {3:<3} {4:<2}".format(
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hex(irq[0]),
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"-" if irq[1] == -1 else irq[1],
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"-" if irq[2] == -1 else irq[2],
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"-" if irq[3] == -1 else irq[3],
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irq[4]))
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return (spurious_code, spurious_nocode, intlist)
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def parse_args():
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global args
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parser = argparse.ArgumentParser(
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description=__doc__,
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formatter_class=argparse.RawDescriptionHelpFormatter)
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parser.add_argument("-m", "--vector-map", required=True,
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help="Output file mapping IRQ lines to IDT vectors")
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parser.add_argument("-o", "--output-idt", required=True,
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help="Output file containing IDT binary")
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parser.add_argument("-a", "--output-vectors-alloc", required=False,
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help="Output file indicating allocated vectors")
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parser.add_argument("-k", "--kernel", required=True,
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help="Zephyr kernel image")
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parser.add_argument("-v", "--verbose", action="store_true",
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help="Print extra debugging information")
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args = parser.parse_args()
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if "VERBOSE" in os.environ:
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args.verbose = 1
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def create_irq_vectors_allocated(vectors, spur_code, spur_nocode, filename):
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# Construct a bitfield over all the IDT vectors, where if bit n is 1,
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# that vector is free. those vectors have either of the two spurious
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# interrupt handlers installed, they are free for runtime installation
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# of interrupts
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num_chars = (len(vectors) + 7) // 8
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vbits = num_chars*[0]
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for i, (handler, _, _) in enumerate(vectors):
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if handler not in (spur_code, spur_nocode):
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continue
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vbit_index = i // 8
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vbit_val = 1 << (i % 8)
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vbits[vbit_index] = vbits[vbit_index] | vbit_val
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with open(filename, "wb") as fp:
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for char in vbits:
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fp.write(struct.pack("<B", char))
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def main():
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parse_args()
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with open(args.kernel, "rb") as fp:
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kernel = ELFFile(fp)
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syms = get_symbols(kernel)
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spur_code, spur_nocode, intlist = get_intlist(kernel)
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max_irq = syms["CONFIG_MAX_IRQ_LINES"]
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max_vec = syms["CONFIG_IDT_NUM_VECTORS"]
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vectors, irq_vec_map = setup_idt(spur_code, spur_nocode, intlist, max_vec,
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max_irq)
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create_idt_binary(vectors, args.output_idt)
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create_irq_vec_map_binary(irq_vec_map, args.vector_map)
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if args.output_vectors_alloc:
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create_irq_vectors_allocated(vectors, spur_code, spur_nocode,
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args.output_vectors_alloc)
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if __name__ == "__main__":
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main()
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