Lauren Murphy 318e6db239 debug: coredump: add xtensa intel adsp, support toolchains ... Adds compatibility with Intel ADSP GDB from Zephyr SDK and from Cadence toolchain to coredump_gdbserver.py. Adds CAVS 15-25 (APL) register definitions. Implements handle_register_single_read_packet to serve ADSP GDB p packets. Prevents BSA from changing between stack dump printout and coredump by taking lock. Observed to be necessary for accurate results on slower simulated platforms. Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>		2022-06-23 15:44:45 -04:00
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core	debug: coredump: add xtensa intel adsp, support toolchains	2022-06-23 15:44:45 -04:00
include	global: Correct extern K_KERNEL_STACK_ARRAY_DEFINE usage	2022-06-20 10:25:52 +02:00
CMakeLists.txt	…
Kconfig	arch/xtensa: Add CCOUNT-based timing API	2022-06-07 19:04:42 +02:00