73 lines
1.4 KiB
ArmAsm
73 lines
1.4 KiB
ArmAsm
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief CPU power management
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*
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* CPU power management routines.
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*/
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#include <zephyr/kernel_structs.h>
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#include <offsets_short.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/linker/sections.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/arch/arc/asm-compat/assembler.h>
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GTEXT(arch_cpu_idle)
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GTEXT(arch_cpu_atomic_idle)
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GDATA(z_arc_cpu_sleep_mode)
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SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
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.align 4
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.word 0
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/*
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* @brief Put the CPU in low-power mode
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*
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* This function always exits with interrupts unlocked.
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*
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* void nanCpuIdle(void)
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*/
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SECTION_FUNC(TEXT, arch_cpu_idle)
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#ifdef CONFIG_TRACING
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PUSHR blink
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jl sys_trace_idle
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POPR blink
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#endif
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/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
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ld r1, [z_arc_cpu_sleep_mode]
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or r1, r1, (1 << 4) /* set IRQ-enabled bit */
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sleep r1
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j_s [blink]
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nop
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/*
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* @brief Put the CPU in low-power mode, entered with IRQs locked
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*
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* This function exits with interrupts restored to <key>.
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*
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* void arch_cpu_atomic_idle(unsigned int key)
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*/
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SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
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#ifdef CONFIG_TRACING
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PUSHR blink
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jl sys_trace_idle
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POPR blink
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#endif
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/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
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ld r1, [z_arc_cpu_sleep_mode]
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or r1, r1, (1 << 4) /* set IRQ-enabled bit */
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sleep r1
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j_s.d [blink]
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seti r0
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