75 lines
2.2 KiB
C
75 lines
2.2 KiB
C
/*
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _ARM_MPU_MEM_CFG_H_
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#define _ARM_MPU_MEM_CFG_H_
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#include <soc.h>
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#include <arch/arm/cortex_m/mpu/arm_mpu.h>
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/* Flash Region Definitions */
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#if CONFIG_FLASH_SIZE == 64
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#define REGION_FLASH_SIZE REGION_64K
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#elif CONFIG_FLASH_SIZE == 128
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#define REGION_FLASH_SIZE REGION_128K
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#elif CONFIG_FLASH_SIZE == 256
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#define REGION_FLASH_SIZE REGION_256K
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#elif CONFIG_FLASH_SIZE == 512
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#define REGION_FLASH_SIZE REGION_512K
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#elif CONFIG_FLASH_SIZE == 1024
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#define REGION_FLASH_SIZE REGION_1M
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#elif CONFIG_FLASH_SIZE == 1536
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#define REGION_FLASH_SIZE REGION_2M /* last 512kB are not mapped */
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#elif CONFIG_FLASH_SIZE == 2048
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#define REGION_FLASH_SIZE REGION_2M
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#else
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#error "Unsupported configuration"
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#endif
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/* SRAM Region Definitions */
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#if CONFIG_SRAM_SIZE == 12
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#define REGION_SRAM_0_SIZE REGION_8K
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#define REGION_SRAM_1_START 0x2000
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#define REGION_SRAM_1_SIZE REGION_4K
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#elif CONFIG_SRAM_SIZE == 20
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#define REGION_SRAM_0_SIZE REGION_16K
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#define REGION_SRAM_1_START 0x4000
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#define REGION_SRAM_1_SIZE REGION_4K
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#elif CONFIG_SRAM_SIZE == 32
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#define REGION_SRAM_0_SIZE REGION_32K
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#elif CONFIG_SRAM_SIZE == 40
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#define REGION_SRAM_0_SIZE REGION_32K
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#define REGION_SRAM_1_START 0x8000
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#define REGION_SRAM_1_SIZE REGION_8K
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#elif CONFIG_SRAM_SIZE == 64
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#define REGION_SRAM_0_SIZE REGION_64K
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#elif CONFIG_SRAM_SIZE == 96
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#define REGION_SRAM_0_SIZE REGION_64K
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#define REGION_SRAM_1_START 0x10000
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#define REGION_SRAM_1_SIZE REGION_32K
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#elif CONFIG_SRAM_SIZE == 128
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#define REGION_SRAM_0_SIZE REGION_128K
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#elif CONFIG_SRAM_SIZE == 192
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#define REGION_SRAM_0_SIZE REGION_128K
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#define REGION_SRAM_1_START 0x20000
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#define REGION_SRAM_1_SIZE REGION_64K
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#elif CONFIG_SRAM_SIZE == 256
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#define REGION_SRAM_0_SIZE REGION_256K
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#elif CONFIG_SRAM_SIZE == 320
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#define REGION_SRAM_0_SIZE REGION_256K
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#define REGION_SRAM_1_START 0x40000
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#define REGION_SRAM_1_SIZE REGION_64K
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#elif CONFIG_SRAM_SIZE == 384
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#define REGION_SRAM_0_SIZE REGION_256K
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#define REGION_SRAM_1_START 0x40000
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#define REGION_SRAM_1_SIZE REGION_128K
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#else
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#error "Unsupported configuration"
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#endif
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#define PERIPHERAL_BASE 0x40000000U /* Peripheral base address */
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#endif /* _ARM_MPU_MEM_CFG_H_ */
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