zephyr/soc/xtensa/intel_s1000
Jordan Yates 9505ee89a3 linker: xtensa: move IDT_LIST region
Move the IDT_LIST memory region to the location recommended by
`intlist.ld`. The documentation specifies that this region should not
overlap other regions, and there is no guarantee that the area after the
`SRAM` region is not used. The end of the address space is much less
likely to be a valid RAM address.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-08-25 18:08:36 -04:00
..
include
soc
xcc soc: intel_s1000: remove log and ztest XCC fixes 2021-03-26 11:19:52 -05:00
CMakeLists.txt
Kconfig.defconfig
Kconfig.soc
iomux.h
linker.ld soc: xtensa: linker: Update linker scripts for C++ build 2021-05-28 09:32:44 -05:00
memory.h linker: xtensa: move IDT_LIST region 2021-08-25 18:08:36 -04:00
soc.c
soc.h arch/xtensa: Add non-HAL caching primitives 2021-03-08 11:14:27 -05:00
soc_mp.c coccinelle: Remove extra semicolon 2021-03-25 11:35:30 -05:00