zephyr/dts/xtensa/espressif
Sylvio Alves e48fe49a70 soc: esp32s3: appcpu: add sram dts information
Make sure SoC has defined RAM size.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-20 07:55:09 -05:00
..
esp32 dts: bindings: can: remove optional sample point properties 2024-03-17 15:36:19 +01:00
esp32s2 dts: bindings: can: remove optional sample point properties 2024-03-17 15:36:19 +01:00
esp32s3 soc: esp32s3: appcpu: add sram dts information 2024-03-20 07:55:09 -05:00