zephyr/dts/riscv
Andrzej Głąbek a8bb9fd1c1 dts: Remove support for nRF54H20 EngA
This was a preview revision of the SoC that will no longer
be supported.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-03-18 19:11:36 +00:00
..
andes dts/riscv/andes: add `andestech,andescore-v5` compatible string 2024-01-31 10:41:49 +01:00
efinix dts/riscv/efinix: add the `efinix,vexriscv-sapphire` compatible string 2024-01-31 10:41:49 +01:00
espressif/esp32c3 dts: bindings: can: remove optional sample point properties 2024-03-17 15:36:19 +01:00
gd
ite it82xx2: Add missing ISRs for gpioj 2024-02-27 14:44:41 +01:00
lowrisc dts/riscv/lowrisc: add `lowrisc,ibex` compatible string 2024-01-31 10:41:49 +01:00
microchip dts: mbox: add PolarFire SoC mailbox interface 2024-02-01 04:33:16 -05:00
niosv
nordic dts: Remove support for nRF54H20 EngA 2024-03-18 19:11:36 +00:00
openisa dts/riscv/openisa: add compatible strings for the RI5CY cores 2024-01-31 10:41:49 +01:00
sifive
starfive dts: riscv: starfive: add DT includes for JH7110 SOC 2024-03-13 11:39:51 -05:00
telink
neorv32.dtsi
renode_riscv32_virt.dtsi
riscv32-litex-vexriscv.dtsi dts/riscv/litex: add `litex,vexriscv-standard` compatible string 2024-01-31 10:41:49 +01:00
virt.dtsi