zephyr/dts/arm/st/h7/stm32h7_dualcore.dtsi

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/*
* Copyright (c) 2020 Moonkwun Jung
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/h7/stm32h7.dtsi>
/ {
cpus {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <1>;
};
};
soc {
mailbox: mailbox@58026400 {
compatible = "st,stm32-hsem-mailbox";
reg = <0x58026400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x02000000>;
status = "disabled";
};
};
};