35 lines
634 B
Plaintext
35 lines
634 B
Plaintext
/*
|
|
* Copyright (c) 2020 Jonas Eriksson, Up to Code AB
|
|
*
|
|
* SoC device tree include for STM32F100xE SoCs
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include <mem.h>
|
|
#include <st/f1/stm32f100Xb.dtsi>
|
|
|
|
/ {
|
|
sram0: memory@20000000 {
|
|
reg = <0x20000000 DT_SIZE_K(32)>;
|
|
};
|
|
|
|
soc {
|
|
flash-controller@40022000 {
|
|
flash0: flash@8000000 {
|
|
reg = <0x08000000 DT_SIZE_K(512)>;
|
|
};
|
|
};
|
|
|
|
spi3: spi@40003c00 {
|
|
compatible = "st,stm32-spi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40003c00 0x400>;
|
|
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
|
|
interrupts = <51 5>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|