fe48f743f3
Fixed the RTC interrupt masking issue on Deep Sleep entry by explicitly unmasking it on Deep Sleep exit sequence. Re-oredered the SoC power states such that SYS_POWER_STATE_CPU_LPS is the lowest possible Low Power State(LPS) and SYS_POWER_STATE_CPU_LPS_2 is the highest possible Low Power State(LPS). This is need to maintain the LPS state consistency across different architectures. Also re-mapped the Low Power States and Deep Sleep States as per Quark SE C1000 data sheet document under Power Management section. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> |
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quark_se_c1000_ss | ||
snps_emsk | ||
snps_nsim |