324 lines
10 KiB
C
324 lines
10 KiB
C
/*
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* Copyright (c) 2017, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __QM_COMMON_H__
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#define __QM_COMMON_H__
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#if (UNIT_TEST)
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#define __volatile__(...)
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#define __asm__
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#endif /* UNIT_TEST */
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#define QM_R volatile const
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#define QM_W volatile
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#define QM_RW volatile
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/* __attribute__((interrupt)) API requires that the interrupt handlers
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* take an interrupt_frame parameter, but it is still undefined, so add
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* an empty definition.
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*/
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struct interrupt_frame;
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#ifndef NULL
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#define NULL ((void *)0)
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#endif
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#define REG_VAL(addr) (*((volatile uint32_t *)addr))
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/**
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* In our reference implementation, by default DEBUG enables QM_PUTS and
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* QM_ASSERT but not QM_PRINTF.
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* User can modify this block to customise the default DEBUG configuration.
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*/
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#if (DEBUG)
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#ifndef ASSERT_ENABLE
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#define ASSERT_ENABLE (1)
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#endif /* ASSERT_EXCLUDE */
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#ifndef PUTS_ENABLE
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#define PUTS_ENABLE (1)
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#endif
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#endif /* DEBUG */
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/**
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* Decide how to handle user input validation. Possible options upon discovering
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* an invalid input parameter are:
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* - Return an error code.
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* - Assert.
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* - Assert and save the error into the General Purpose Sticky Register 0.
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* - Do nothing, only recommended when code size is a major concern.
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*/
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#if (DEBUG)
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#ifndef QM_CHECK_RETURN_ERROR
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#define QM_CHECK_RETURN_ERROR (1)
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#endif
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#ifndef QM_CHECK_ASSERT
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#define QM_CHECK_ASSERT (0)
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#endif
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#ifndef QM_CHECK_ASSERT_SAVE_ERROR
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#define QM_CHECK_ASSERT_SAVE_ERROR (0)
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#endif
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#ifdef ITA_NO_ASSERT
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#undef ASSERT_ENABLE
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#endif
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#endif /* DEBUG */
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/*
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* Setup UART for stdout/stderr.
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*/
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void stdout_uart_setup(uint32_t baud_divisors);
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/*
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* Default UART baudrate divisors at the sysclk speed set by Boot ROM
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*/
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#define BOOTROM_UART_115200 (QM_UART_CFG_BAUD_DL_PACK(0, 17, 6))
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/**
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* Selectively enable printf/puts/assert.
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* User can modify the defines to divert the calls to custom implementations.
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*/
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#if (PRINTF_ENABLE || PUTS_ENABLE || ASSERT_ENABLE)
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#include <stdio.h>
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#endif /* PRINTF_ENABLE || PUTS_ENABLE || ASSERT_ENABLE */
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#if (PRINTF_ENABLE)
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int pico_printf(const char *format, ...);
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#define QM_PRINTF(...) pico_printf(__VA_ARGS__)
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#else
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#define QM_PRINTF(...)
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#endif /* PRINTF_ENABLE */
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#if (PUTS_ENABLE)
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#define QM_PUTS(x) puts(x)
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#else
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#define QM_PUTS(x)
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#endif /* PUTS_ENABLE */
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#if (ASSERT_ENABLE)
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#include <assert.h>
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#define QM_ASSERT(x) assert(x)
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#else
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#define QM_ASSERT(x)
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#endif /* ASSERT_ENABLE */
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/**
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* Select which UART to use for stdout/err (default: UART0)
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*/
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#if (STDOUT_UART_0 && STDOUT_UART_1)
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#error "STDOUT_UART_0 and STDOUT_UART_1 are mutually exclusive"
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#elif(!(STDOUT_UART_0 || STDOUT_UART_1))
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#define STDOUT_UART_0 (1)
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#endif
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#if (STDOUT_UART_0)
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#define STDOUT_UART (QM_UART_0)
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#elif(STDOUT_UART_1)
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#define STDOUT_UART (QM_UART_1)
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#endif
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/*
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* Stdout UART initialization is enabled by default. Use this switch if you wish
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* to disable it (e.g. if the UART is already initialized by an application
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* running on the other core).
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*/
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#ifndef STDOUT_UART_INIT_DISABLE
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#define STDOUT_UART_INIT (1)
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#endif
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/**
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* Select assert action (default: put the IA core into HLT state)
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*/
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#if (ASSERT_ACTION_HALT && ASSERT_ACTION_RESET)
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#error "ASSERT_ACTION_HALT and ASSERT_ACTION_RESET are mutually exclusive"
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#elif(!(ASSERT_ACTION_HALT || ASSERT_ACTION_RESET))
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#define ASSERT_ACTION_HALT (1)
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#endif
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/**
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* Select check action
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*/
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#if (1 < QM_CHECK_RETURN_ERROR + QM_CHECK_ASSERT + QM_CHECK_ASSERT_SAVE_ERROR)
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#error "Only a single check action may be performed"
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#endif
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#if (QM_CHECK_RETURN_ERROR)
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#define QM_CHECK(cond, error) \
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do { \
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if (!(cond)) { \
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return (error); \
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} \
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} while (0)
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#elif(QM_CHECK_ASSERT)
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#define QM_CHECK(cond, error) QM_ASSERT(cond)
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#elif(QM_CHECK_ASSERT_SAVE_ERROR)
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#define SAVE_LAST_ERROR(x) \
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do { \
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QM_SCSS_GP->gps[0] = x; \
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} while (0)
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#define QM_CHECK(cond, error) \
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do { \
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SAVE_LAST_ERROR(error); \
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QM_ASSERT(cond); \
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} while (0)
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#else
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/* Do nothing with checks */
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#define QM_CHECK(cond, error)
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#endif
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/* Bitwise operation helpers */
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#ifndef BIT
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#define BIT(x) (1U << (x))
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#endif
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/* Set all bits */
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#ifndef SET_ALL_BITS
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#define SET_ALL_BITS (-1)
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#endif
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/*
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* ISR declaration.
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*
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* The x86 'interrupt' attribute requires an interrupt_frame parameter.
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* To keep consistency between different cores and compiler capabilities, we add
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* the interrupt_frame parameter to all ISR handlers. When not needed, the value
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* passed is a dummy one (NULL).
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*/
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#if (UNIT_TEST)
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#define QM_ISR_DECLARE(handler) \
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void handler(__attribute__( \
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(unused)) struct interrupt_frame *__interrupt_frame__)
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#else /* !UNIT_TEST */
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#if (QM_SENSOR) && !(ENABLE_EXTERNAL_ISR_HANDLING)
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/*
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* Sensor Subsystem 'interrupt' attribute.
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*/
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#define QM_ISR_DECLARE(handler) \
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__attribute__((interrupt("ilink"))) void handler(__attribute__( \
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(unused)) struct interrupt_frame *__interrupt_frame__)
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#elif(ENABLE_EXTERNAL_ISR_HANDLING)
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/*
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* Allow users to define their own ISR management. This includes optimisations
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* and clearing EOI registers.
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*/
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#define QM_ISR_DECLARE(handler) void handler(__attribute__((unused)) void *data)
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#elif(__iamcu__)
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/*
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* Lakemont with compiler supporting 'interrupt' attribute.
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* We assume that if the compiler supports the IAMCU ABI it also supports the
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* 'interrupt' attribute.
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*/
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#define QM_ISR_DECLARE(handler) \
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__attribute__((interrupt)) void handler(__attribute__( \
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(unused)) struct interrupt_frame *__interrupt_frame__)
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#else
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/*
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* Lakemont with compiler not supporting the 'interrupt' attribute.
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*/
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#define QM_ISR_DECLARE(handler) \
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void handler(__attribute__( \
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(unused)) struct interrupt_frame *__interrupt_frame__)
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#endif
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#endif /* UNIT_TEST */
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/**
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* Helper to convert a macro parameter into its literal text.
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*/
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#define QM_STRINGIFY(s) #s
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/**
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* Convert the source version numbers into an ASCII string.
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*/
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#define QM_VER_STRINGIFY(major, minor, patch) \
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QM_STRINGIFY(major) "." QM_STRINGIFY(minor) "." QM_STRINGIFY(patch)
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#if (SOC_WATCH_ENABLE)
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/**
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* Front-end macro for logging a SoC Watch event. When SOC_WATCH_ENABLE
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* is not set to 1, the macro expands to nothing, there is no overhead.
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*
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* @param[in] event_id The Event ID of the profile event.
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* @param[in] ev_data A parameter to the event ID (if the event needs one).
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*
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* @returns Nothing.
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*/
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#define SOC_WATCH_LOG_EVENT(event, param) \
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do { \
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soc_watch_log_event(event, param); \
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} while (0)
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/**
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* Front-end macro for logging application events via the power profiler
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* logger. When SOC_WATCH_ENABLE is not set to 1, the macro expands to
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* nothing, there is no overhead.
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*
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* @param[in] event_id The Event ID of the profile event.
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* @param[in] ev_subtype A 1-byte user-defined event_id.
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* @param[in] ev_data A parameter to the event ID (if the event needs one).
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*
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* @returns Nothing.
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*/
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#define SOC_WATCH_LOG_APP_EVENT(event, subtype, param) \
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do { \
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soc_watch_log_app_event(event, subtype, param); \
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} while (0)
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/**
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* Front-end macro for triggering a buffer flush via soc_watch.
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*
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* This allows applications layered on top of QMSI to trigger the transfer of
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* profiler information to the host whenever it requires.
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* When SOC_WATCH_ENABLE is not set to 1,
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* the macro expands to nothing, there is no overhead.
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*/
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#define SOC_WATCH_TRIGGER_FLUSH() \
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do { \
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soc_watch_trigger_flush(); \
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} while (0)
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#else
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#define SOC_WATCH_LOG_EVENT(event, param)
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#define SOC_WATCH_LOG_APP_EVENT(event, subtype, param)
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#define SOC_WATCH_TRIGGER_FLUSH()
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#endif
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#endif /* __QM_COMMON_H__ */
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