307 lines
9.2 KiB
Plaintext
307 lines
9.2 KiB
Plaintext
# Kconfig - timer driver configuration options
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#
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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# Copyright (c) 2019 Intel Corp.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menu "Timer Drivers"
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menuconfig APIC_TIMER
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bool "New local APIC timer"
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depends on X86
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depends on LOAPIC
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select TICKLESS_CAPABLE
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help
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Use the "new" local APIC timer driver for the system timer.
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This is a replacement for the legacy local APIC timer driver
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which supports tickless operation, but not the Quark MVIC.
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if APIC_TIMER
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config APIC_TIMER_IRQ
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int "Local APIC timer IRQ"
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default 24
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help
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This option specifies the IRQ used by the local APIC timer.
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config APIC_TIMER_IRQ_PRIORITY
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int "Local APIC timer IRQ priority"
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default 4
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help
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This option specifies the IRQ priority used by the local APIC timer.
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config APIC_TIMER_TSC
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bool "Use invariant TSC for z_timer_cycle_get_32()"
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default n
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help
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If your CPU supports invariant TSC, and you know the ratio of the
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TSC frequency to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC (the local APIC
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timer frequency), then enable this for a much faster and more
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accurate z_timer_cycle_get_32().
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if APIC_TIMER_TSC
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config APIC_TIMER_TSC_N
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int "TSC to local APIC timer frequency multiplier (N)"
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default 1
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config APIC_TIMER_TSC_M
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int "TSC to local APIC timer frequency divisor (M)"
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default 1
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endif # APIC_TIMER_TSC
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endif # APIC_TIMER
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config HPET_TIMER
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bool "HPET timer"
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depends on (X86 || X86_64)
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select IOAPIC if X86
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select LOAPIC if X86
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select TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
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select TICKLESS_CAPABLE
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help
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This option selects High Precision Event Timer (HPET) as a
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system timer.
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config LOAPIC_TIMER
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bool "LOAPIC timer"
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depends on LOAPIC && X86
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help
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This option selects LOAPIC timer as a system timer.
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if LOAPIC_TIMER
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config LOAPIC_TIMER_IRQ
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int "Local APIC Timer IRQ"
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default 24
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help
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This option specifies the IRQ used by the LOAPIC timer.
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config LOAPIC_TIMER_IRQ_PRIORITY
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int "Local APIC Timer IRQ Priority"
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default 2
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help
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This options specifies the IRQ priority used by the LOAPIC timer.
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config TSC_CYCLES_PER_SEC
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int "Frequency of x86 CPU timestamp counter"
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default 0
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help
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The x86 implementation of LOAPIC k_cycle_get_32() relies on the x86 TSC.
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This runs at the CPU speed and not the bus speed. If set to 0, the
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value of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC will be used instead;
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many MCUs these values are the same.
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endif #LOAPIC_TIMER
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menuconfig ARCV2_TIMER
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bool "ARC Timer"
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default y
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depends on ARC
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the ARCv2 processor timer 0
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and provides the standard "system clock driver" interfaces.
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config ARCV2_TIMER_IRQ_PRIORITY
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int "ARC timer interrupt priority"
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default 0
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depends on ARCV2_TIMER
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help
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This option specifies the IRQ priority used by the ARC timer. Lower
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values have higher priority.
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config CORTEX_M_SYSTICK
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bool "Cortex-M SYSTICK timer"
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depends on CPU_CORTEX_M_HAS_SYSTICK
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Cortex-M processor
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SYSTICK timer and provides the standard "system clock driver" interfaces.
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config ALTERA_AVALON_TIMER
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bool "Altera Avalon Interval Timer"
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default y
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depends on NIOS2
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help
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This module implements a kernel device driver for the Altera Avalon
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Interval Timer as described in the Embedded IP documentation, for use
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with Nios II and possibly other Altera soft CPUs. It provides the
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standard "system clock driver" interfaces.
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config NRF_RTC_TIMER
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bool "nRF Real Time Counter (NRF_RTC1) Timer"
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depends on CLOCK_CONTROL
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depends on SOC_COMPATIBLE_NRF
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the nRF Real Time
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Counter NRF_RTC1 and provides the standard "system clock driver"
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interfaces.
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config RISCV_MACHINE_TIMER
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bool "RISCV Machine Timer"
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depends on SOC_FAMILY_RISCV_PRIVILEGE
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the generic RISCV machine
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timer driver. It provides the standard "system clock driver" interfaces.
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config RV32M1_LPTMR_TIMER
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bool "RV32M1 LPTMR system timer driver"
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default y
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depends on SOC_OPENISA_RV32M1_RISCV32
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depends on !TICKLESS_IDLE
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depends on RV32M1_INTMUX
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help
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This module implements a kernel device driver for using the LPTMR
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peripheral as the system clock. It provides the standard "system clock
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driver" interfaces.
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config LITEX_TIMER
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bool "LiteX Timer"
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default y
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depends on !TICKLESS_IDLE
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depends on SOC_RISCV32_LITEX_VEXRISCV
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help
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This module implements a kernel device driver for LiteX Timer.
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config NATIVE_POSIX_TIMER
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bool "(POSIX) native_posix timer driver"
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default y
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depends on BOARD_NATIVE_POSIX
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the native_posix HW timer
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model
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config XTENSA_TIMER
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bool "Xtensa timer support"
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depends on XTENSA
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default y
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select TICKLESS_CAPABLE
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help
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Enables a system timer driver for Xtensa based on the CCOUNT
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and CCOMPARE special registers.
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config XTENSA_TIMER_ID
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int "System timer CCOMPAREn register index"
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default 1
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depends on XTENSA_TIMER
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help
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Index of the CCOMPARE register (and associated interrupt)
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used for the system timer. Xtensa CPUs have hard-configured
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interrupt priorities associated with each timer, and some of
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them can be unmaskable (and thus not usable by OS code that
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need synchronization, like the timer subsystem!). Choose
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carefully. Generally you want the timer with the highest
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priority maskable interrupt.
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config SAM0_RTC_TIMER
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bool "Atmel SAM0 series RTC timer"
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depends on SOC_FAMILY_SAM0
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Atmel SAM0
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series Real Time Counter and provides the standard "system clock
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driver" interfaces.
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config MCHP_XEC_RTOS_TIMER
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bool "Microchip XEC series RTOS timer"
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depends on SOC_FAMILY_MEC
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Microchip
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XEC series RTOS timer and provides the standard "system clock
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driver" interfaces.
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config CC13X2_CC26X2_RTC_TIMER
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bool "TI SimpleLink CC13x2/CC26x2 RTC timer"
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depends on SOC_SERIES_CC13X2_CC26X2
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the TI SimpleLink
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CC13X2_CC26X2 series Real Time Counter and provides the standard
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"system clock driver" interfaces.
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config XLNX_PSTTC_TIMER
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bool "Xilinx PS ttc timer support"
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default y
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depends on SOC_XILINX_ZYNQMP
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help
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This module implements a kernel device driver for the Xilinx ZynqMP
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platform provides the standard "system clock driver" interfaces.
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If unchecked, no timer will be used.
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config XLNX_PSTTC_TIMER_INDEX
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int "Xilinx PS ttc timer index"
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range 0 3
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default 0
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depends on XLNX_PSTTC_TIMER
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help
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This is the index of TTC timer picked to provide system clock.
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config SYSTEM_CLOCK_DISABLE
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bool "API to disable system clock"
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help
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This option enables the sys_clock_disable() API in the kernel. It is
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needed by some subsystems (which will automatically select it), but is
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rarely needed by applications.
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config TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
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bool "Timer queries its hardware to find its frequency at runtime"
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help
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The drivers select this option automatically when needed. Do not modify
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this unless you have a very good reason for it.
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config SYSTEM_CLOCK_SLOPPY_IDLE
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bool "Timer allowed to skew uptime clock during idle"
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help
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When true, the timer driver is not required to maintain a
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correct system uptime count when the system enters idle.
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Some platforms may take advantage of this to reduce the
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overhead from regular interrupts required to handle counter
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wraparound conditions.
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config SYSTEM_CLOCK_INIT_PRIORITY
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int "System clock driver initialization priority"
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default 0
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help
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This options can be used to set a specific initialization priority
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value for the system clock driver. As driver initialization might need
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the clock to be running already, you should let the default value as it
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is (0).
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config TICKLESS_CAPABLE
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bool "Timer driver supports tickless operation"
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help
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Timer drivers should select this flag if they are capable of
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supporting tickless operation. That is, a call to
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z_clock_set_timeout() with a number of ticks greater than
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one should be expected not to produce a call to
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z_clock_announce() (really, not to produce an interrupt at
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all) until the specified expiration.
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config QEMU_TICKLESS_WORKAROUND
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bool "Disable tickless on qemu due to asynchrony bug"
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depends on QEMU_TARGET && TICKLESS_KERNEL
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help
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Qemu (without -icount) has trouble keeping time when the
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host process needs to timeshare. The host OS will routinely
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schedule out a process at timescales equivalent to the guest
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tick rate. With traditional ticks delivered regularly by
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the hardware, that's mostly OK as it looks like a late
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interrupt. But in tickless mode, the driver needs some CPU
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in order to schedule the tick in the first place. If that
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gets delayed across a tick boundary, time gets wonky. This
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tunable is a hint to the driver to disable tickless
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accounting on qemu. Use it only on tests that are known to
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have problems.
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endmenu
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