307 lines
8.0 KiB
C
307 lines
8.0 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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* Copyright (c) 2017 Oticon A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* SW side of the IRQ handling
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*/
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#include <stdint.h>
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#include "irq_handler.h"
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#include <zephyr/irq_offload.h>
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#include <zephyr/kernel_structs.h>
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#include "kernel_internal.h"
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#include "kswap.h"
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#include "irq_ctrl.h"
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#include "posix_core.h"
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#include "board_soc.h"
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#include <zephyr/sw_isr_table.h>
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#include "soc.h"
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#include <zephyr/tracing/tracing.h>
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typedef void (*normal_irq_f_ptr)(const void *);
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typedef int (*direct_irq_f_ptr)(void);
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typedef struct _isr_list isr_table_entry_t;
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static isr_table_entry_t irq_vector_table[N_IRQS] = { { 0 } };
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static int currently_running_irq = -1;
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static inline void vector_to_irq(int irq_nbr, int *may_swap)
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{
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sys_trace_isr_enter();
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if (irq_vector_table[irq_nbr].func == NULL) { /* LCOV_EXCL_BR_LINE */
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/* LCOV_EXCL_START */
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posix_print_error_and_exit("Received irq %i without a "
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"registered handler\n",
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irq_nbr);
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/* LCOV_EXCL_STOP */
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} else {
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if (irq_vector_table[irq_nbr].flags & ISR_FLAG_DIRECT) {
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*may_swap |= ((direct_irq_f_ptr)
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irq_vector_table[irq_nbr].func)();
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} else {
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#ifdef CONFIG_PM
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posix_irq_check_idle_exit();
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#endif
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((normal_irq_f_ptr)irq_vector_table[irq_nbr].func)
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(irq_vector_table[irq_nbr].param);
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*may_swap = 1;
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}
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}
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sys_trace_isr_exit();
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}
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/**
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* When an interrupt is raised, this function is called to handle it and, if
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* needed, swap to a re-enabled thread
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*
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* Note that even that this function is executing in a Zephyr thread, it is
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* effectively the model of the interrupt controller passing context to the IRQ
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* handler and therefore its priority handling
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*/
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void posix_irq_handler(void)
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{
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uint64_t irq_lock;
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int irq_nbr;
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static int may_swap;
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irq_lock = hw_irq_ctrl_get_current_lock();
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if (irq_lock) {
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/* "spurious" wakes can happen with interrupts locked */
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return;
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}
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if (_kernel.cpus[0].nested == 0) {
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may_swap = 0;
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}
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_kernel.cpus[0].nested++;
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while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1) {
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int last_current_running_prio = hw_irq_ctrl_get_cur_prio();
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int last_running_irq = currently_running_irq;
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hw_irq_ctrl_set_cur_prio(hw_irq_ctrl_get_prio(irq_nbr));
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hw_irq_ctrl_clear_irq(irq_nbr);
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currently_running_irq = irq_nbr;
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vector_to_irq(irq_nbr, &may_swap);
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currently_running_irq = last_running_irq;
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hw_irq_ctrl_set_cur_prio(last_current_running_prio);
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}
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_kernel.cpus[0].nested--;
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/* Call swap if all the following is true:
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* 1) may_swap was enabled
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* 2) We are not nesting irq_handler calls (interrupts)
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* 3) Next thread to run in the ready queue is not this thread
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*/
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if (may_swap
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&& (hw_irq_ctrl_get_cur_prio() == 256)
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&& (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) {
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(void)z_swap_irqlock(irq_lock);
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}
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}
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/**
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* Thru this function the IRQ controller can raise an immediate interrupt which
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* will interrupt the SW itself
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* (this function should only be called from the HW model code, from SW threads)
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*/
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void posix_irq_handler_im_from_sw(void)
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{
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/*
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* if a higher priority interrupt than the possibly currently running is
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* pending we go immediately into irq_handler() to vector into its
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* handler
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*/
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if (hw_irq_ctrl_get_highest_prio_irq() != -1) {
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if (!posix_is_cpu_running()) { /* LCOV_EXCL_BR_LINE */
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/* LCOV_EXCL_START */
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posix_print_error_and_exit("programming error: %s "
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"called from a HW model thread\n",
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__func__);
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/* LCOV_EXCL_STOP */
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}
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posix_irq_handler();
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}
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}
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/**
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* @brief Disable all interrupts on the CPU
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*
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* This routine disables interrupts. It can be called from either interrupt,
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* task or fiber level. This routine returns an architecture-dependent
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* lock-out key representing the "interrupt disable state" prior to the call;
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* this key can be passed to irq_unlock() to re-enable interrupts.
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*
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* The lock-out key should only be used as the argument to the irq_unlock()
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* API. It should never be used to manually re-enable interrupts or to inspect
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* or manipulate the contents of the source register.
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*
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* This function can be called recursively: it will return a key to return the
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* state of interrupt locking to the previous level.
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*
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* WARNINGS
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* Invoking a kernel routine with interrupts locked may result in
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* interrupts being re-enabled for an unspecified period of time. If the
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* called routine blocks, interrupts will be re-enabled while another
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* thread executes, or while the system is idle.
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*
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* The "interrupt disable state" is an attribute of a thread. Thus, if a
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* fiber or task disables interrupts and subsequently invokes a kernel
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* routine that causes the calling thread to block, the interrupt
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* disable state will be restored when the thread is later rescheduled
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* for execution.
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*
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* @return An architecture-dependent lock-out key representing the
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* "interrupt disable state" prior to the call.
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*
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*/
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unsigned int posix_irq_lock(void)
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{
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return hw_irq_ctrl_change_lock(true);
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}
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/**
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* @brief Enable all interrupts on the CPU
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*
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* This routine re-enables interrupts on the CPU. The @a key parameter is a
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* board-dependent lock-out key that is returned by a previous invocation of
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* board_irq_lock().
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*
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* This routine can be called from either interrupt, task or fiber level.
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*/
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void posix_irq_unlock(unsigned int key)
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{
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hw_irq_ctrl_change_lock(key);
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}
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void posix_irq_full_unlock(void)
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{
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hw_irq_ctrl_change_lock(false);
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}
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void posix_irq_enable(unsigned int irq)
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{
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hw_irq_ctrl_enable_irq(irq);
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}
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void posix_irq_disable(unsigned int irq)
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{
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hw_irq_ctrl_disable_irq(irq);
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}
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int posix_irq_is_enabled(unsigned int irq)
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{
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return hw_irq_ctrl_is_irq_enabled(irq);
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}
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int posix_get_current_irq(void)
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{
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return currently_running_irq;
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}
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/**
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* Configure a static interrupt.
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*
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* posix_isr_declare will populate the interrupt table table with the
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* interrupt's parameters, the vector table and the software ISR table.
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*
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* We additionally set the priority in the interrupt controller at
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* runtime.
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*
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* @param irq_p IRQ line number
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* @param flags [plug it directly (1), or as a SW managed interrupt (0)]
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* @param isr_p Interrupt service routine
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* @param isr_param_p ISR parameter
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* @param flags_p IRQ options
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*/
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void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
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const void *isr_param_p)
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{
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if (irq_p >= N_IRQS) {
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posix_print_error_and_exit("Attempted to configure not existent interrupt %u\n",
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irq_p);
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return;
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}
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irq_vector_table[irq_p].irq = irq_p;
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irq_vector_table[irq_p].func = isr_p;
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irq_vector_table[irq_p].param = isr_param_p;
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irq_vector_table[irq_p].flags = flags;
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}
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/**
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* @internal
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*
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* @brief Set an interrupt's priority
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*
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* Lower values take priority over higher values.
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*/
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void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
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{
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hw_irq_ctrl_prio_set(irq, prio);
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}
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/**
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* Similar to ARM's NVIC_SetPendingIRQ
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* set a pending IRQ from SW
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*
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* Note that this will interrupt immediately if the interrupt is not masked and
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* IRQs are not locked, and this interrupt has higher priority than a possibly
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* currently running interrupt
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*/
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void posix_sw_set_pending_IRQ(unsigned int IRQn)
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{
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hw_irq_ctrl_raise_im_from_sw(IRQn);
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}
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/**
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* Similar to ARM's NVIC_ClearPendingIRQ
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* clear a pending irq from SW
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*/
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void posix_sw_clear_pending_IRQ(unsigned int IRQn)
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{
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hw_irq_ctrl_clear_irq(IRQn);
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}
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#ifdef CONFIG_IRQ_OFFLOAD
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/**
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* Storage for functions offloaded to IRQ
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*/
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static void (*off_routine)(const void *);
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static const void *off_parameter;
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/**
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* IRQ handler for the SW interrupt assigned to irq_offload()
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*/
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static void offload_sw_irq_handler(const void *a)
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{
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ARG_UNUSED(a);
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off_routine(off_parameter);
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}
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/**
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* @brief Run a function in interrupt context
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*
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* Raise the SW IRQ assigned to handled this
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*/
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void posix_irq_offload(void (*routine)(const void *), const void *parameter)
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{
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off_routine = routine;
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off_parameter = parameter;
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posix_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
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posix_irq_enable(OFFLOAD_SW_IRQ);
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posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
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posix_irq_disable(OFFLOAD_SW_IRQ);
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}
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#endif /* CONFIG_IRQ_OFFLOAD */
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