81 lines
1.6 KiB
Plaintext
81 lines
1.6 KiB
Plaintext
#include <arm/armv7-m.dtsi>
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#include <ti/mem.h>
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#include <dt-bindings/i2c/i2c.h>
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#define INT_UARTA0 21 // UART0 Rx and Tx
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#define INT_UARTA1 22 // UART1 Rx and Tx
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#define INT_I2CA0 24 // I2C controller
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/* Note: Zephyr uses exception numbers, vs the IRQ #s used by the CC32XX SDK */
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/* which are offset by 16: */
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#define EXP_UARTA0 (INT_UARTA0 - 16)
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#define EXP_UARTA1 (INT_UARTA1 - 16)
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#define EXP_I2CA0 (INT_I2CA0 - 16)
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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sram0: memory@20004000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <DT_SRAM_START DT_SRAM_SIZE>;
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};
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flash0: serial-flash@0 {
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compatible = "serial-flash";
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reg = <0x0 DT_SFLASH_SIZE>;
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};
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#if defined(CONFIG_SOC_CC3220SF)
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flash1: flash@1000000 {
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compatible = "soc-nv-flash";
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label = "FLASH_1";
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reg = <0x01000000 DT_FLASH_SIZE>;
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};
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#endif
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soc {
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uart0: uart@4000C000 {
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compatible = "ti,cc32xx-uart";
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reg = <0x4000C000 0x4c>;
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interrupts = <EXP_UARTA0 3>;
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status = "disabled";
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label = "UART_0";
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};
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uart1: uart@4000D000 {
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compatible = "ti,cc32xx-uart";
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reg = <0x4000D000 0x4c>;
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interrupts = <EXP_UARTA1 3>;
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status = "disabled";
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label = "UART_1";
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};
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i2c0: i2c@40020000 {
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compatible = "ti,cc32xx-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40020000 0xfc8>;
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interrupts = <EXP_I2CA0 3>;
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status = "disabled";
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label= "I2C_0";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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