zephyr/dts/riscv
Martin Åberg 152d3e46ad soc/riscv: add the QEMU "RISC-V VirtIO board"
The QEMU RISC-V VirtIO board is capable:
- 8 x CPU
- 256 MiB RAM
- PMP
- PCI
- ISA string: RVnnIMAFDCSU
  - mul/div
  - FPU with double precision
  - MMU
  - Compressed instructions

Devicetree was extracted from QEMU as described in virt.dtsi.
The same .dtsi SOC description is used for 32-bit and 64-bit.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2021-01-15 13:06:33 -05:00
..
it8xxx2.dtsi drivers/i2c: add i2c driver on it8xxx2 platform 2021-01-15 11:22:57 -05:00
microsemi-miv.dtsi dts: bindings: add IRQ priority support for SiFive PLIC 2021-01-14 12:43:58 -06:00
riscv32-fe310.dtsi boards/dts: riscv: add SiFive FE310 watchdog driver bindings 2021-01-15 07:19:38 -06:00
riscv32-litex-vexriscv.dtsi boards/dts: riscv: litex_vexriscv: add clock control driver to devicetree 2020-12-06 12:35:16 -05:00
rv32m1.dtsi
rv32m1_ri5cy.dtsi
rv32m1_zero_riscy.dtsi
virt.dtsi soc/riscv: add the QEMU "RISC-V VirtIO board" 2021-01-15 13:06:33 -05:00