275 lines
6.0 KiB
Plaintext
275 lines
6.0 KiB
Plaintext
# STM32 MCU clock control driver config
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# Copyright (c) 2017 Linaro
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# Copyright (c) 2017 RnDity Sp. z o.o.
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# SPDX-License-Identifier: Apache-2.0
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menuconfig CLOCK_CONTROL_STM32_CUBE
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bool "STM32 Reset & Clock Control"
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depends on SOC_FAMILY_STM32
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select USE_STM32_LL_UTILS
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select USE_STM32_LL_RCC if SOC_SERIES_STM32MP1X
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help
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Enable driver for Reset & Clock Control subsystem found
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in STM32 family of MCUs
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if CLOCK_CONTROL_STM32_CUBE
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config CLOCK_CONTROL_STM32_DEVICE_INIT_PRIORITY
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int "Clock Control Device Priority"
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default 1
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help
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This option controls the priority of clock control
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device initialization. Higher priority ensures that the device
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is initialized earlier in the startup cycle. If unsure, leave
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at default value 1
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choice CLOCK_STM32_SYSCLK_SRC
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prompt "STM32 System Clock Source"
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config CLOCK_STM32_SYSCLK_SRC_HSE
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bool "HSE"
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help
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Use HSE as source of SYSCLK
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config CLOCK_STM32_SYSCLK_SRC_HSI
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bool "HSI"
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help
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Use HSI as source of SYSCLK
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config CLOCK_STM32_SYSCLK_SRC_MSI
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bool "MSI"
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depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX
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help
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Use MSI as source of SYSCLK
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config CLOCK_STM32_SYSCLK_SRC_PLL
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bool "PLL"
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help
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Use PLL as source of SYSCLK
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endchoice #CLOCK_STM32_SYSCLK_SRC
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config CLOCK_STM32_HSE_BYPASS
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bool "HSE bypass"
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depends on CLOCK_STM32_SYSCLK_SRC_HSE || CLOCK_STM32_PLL_SRC_HSE
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help
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Enable this option to bypass external high-speed clock (HSE).
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config CLOCK_STM32_HSE_CLOCK
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int "HSE clock value"
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depends on CLOCK_STM32_SYSCLK_SRC_HSE || CLOCK_STM32_PLL_SRC_HSE
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default 8000000
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help
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Value of external high-speed clock (HSE).
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config CLOCK_STM32_MSI_RANGE
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int "MSI frequency range"
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depends on CLOCK_STM32_SYSCLK_SRC_MSI
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default 8
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help
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Frequency range of MSI when MSI range is provided in RCC_CR register
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Range 0: 100kHz
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Range 1: 200kHz
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Range 2 around 400 kHz
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Range 3 around 800 kHz
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Range 4: 1 MHz
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Range 5: 2 MHz
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Range 6: 4 MHz (reset value)
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Range 7: 8 MHz
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Range 8: 16 MHz
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Range 9: 24 MHz
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Range 10: 32 MHz
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Range 11: 48 MHz
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choice
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prompt "STM32 PLL Clock Source"
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default CLOCK_STM32_PLL_SRC_HSI
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depends on CLOCK_STM32_SYSCLK_SRC_PLL
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config CLOCK_STM32_PLL_SRC_MSI
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bool "MSI"
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depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX
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help
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Use MSI as source of PLL
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config CLOCK_STM32_PLL_SRC_HSI
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bool "HSI"
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help
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Use HSI as source of PLL
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config CLOCK_STM32_PLL_SRC_HSE
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bool "HSE"
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help
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Use HSE as source of PLL
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config CLOCK_STM32_PLL_SRC_PLL2
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bool "PLL2"
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depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
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help
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Use PLL2 as source of main PLL. This is equivalent of defining
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PLL2 as source PREDIV1SCR. If not selected, default source is HSE.
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endchoice
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# Source series specific files for PLL settings
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source "drivers/clock_control/Kconfig.stm32f0_f3"
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source "drivers/clock_control/Kconfig.stm32f1"
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source "drivers/clock_control/Kconfig.stm32f2_f4_f7"
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source "drivers/clock_control/Kconfig.stm32h7"
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source "drivers/clock_control/Kconfig.stm32l0_l1"
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source "drivers/clock_control/Kconfig.stm32l4_wb"
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source "drivers/clock_control/Kconfig.stm32g0"
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source "drivers/clock_control/Kconfig.stm32g4"
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# Bus clocks configuration options
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if !SOC_SERIES_STM32H7X
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config CLOCK_STM32_AHB_PRESCALER
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int "AHB prescaler"
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default 1
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range 1 512
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depends on !SOC_SERIES_STM32WBX
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help
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AHB prescaler, allowed values: 1, 2, 4, 8, 16, 64, 128,
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256, 512.
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config CLOCK_STM32_APB1_PRESCALER
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int "APB1 prescaler"
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default 1
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range 1 16
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help
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APB1 Low speed clock (PCLK1) prescaler, allowed values:
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1, 2, 4, 8, 16
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config CLOCK_STM32_APB2_PRESCALER
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int "APB2 prescaler"
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default 1
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range 1 16
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depends on !SOC_SERIES_STM32F0X
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help
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APB2 High speed clock (PCLK2) prescaler, allowed values:
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1, 2, 4, 8, 16
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config CLOCK_STM32_CPU1_PRESCALER
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int "CPU1 HCLK prescaler"
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default 1
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range 1 512
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depends on SOC_SERIES_STM32WBX
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help
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CPU1 HCLK prescaler, allowed values: 1, 2, 4, 8, 16, 64, 128,
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256, 512.
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config CLOCK_STM32_CPU2_PRESCALER
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int "CPU2 HCLK prescaler"
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default 1
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range 1 512
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depends on SOC_SERIES_STM32WBX
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help
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CPU2 HCLK prescaler, allowed values: 1, 2, 4, 8, 16, 64, 128,
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256, 512.
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config CLOCK_STM32_AHB4_PRESCALER
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int "AHB4 HCLK prescaler"
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default 1
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range 1 512
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depends on SOC_SERIES_STM32WBX
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help
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HCLK4 prescaler, allowed values: 1, 2, 4, 8, 16, 64, 128,
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256, 512.
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endif # !SOC_SERIES_STM32H7X
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# Micro-controller Clock output configuration options
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choice
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prompt "STM32 MCO1 Clock Source"
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default CLOCK_STM32_MCO1_SRC_NOCLOCK
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config CLOCK_STM32_MCO1_SRC_NOCLOCK
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bool "NOCLOCK"
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help
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MCO1 output disabled, no clock on MCO1
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config CLOCK_STM32_MCO1_SRC_LSE
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bool "LSE"
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depends on SOC_SERIES_STM32F4X
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help
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Use LSE as source of MCO1
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config CLOCK_STM32_MCO1_SRC_HSE
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bool "HSE"
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depends on SOC_SERIES_STM32F4X
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help
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Use HSE as source of MCO1
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config CLOCK_STM32_MCO1_SRC_HSI
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bool "HSI"
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depends on SOC_SERIES_STM32F4X
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help
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Use HSI as source of MCO1
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config CLOCK_STM32_MCO1_SRC_PLLCLK
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bool "PLLCLK"
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depends on SOC_SERIES_STM32F4X
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help
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Use PLLCLK as source of MCO1
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endchoice
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config CLOCK_STM32_MCO1_DIV
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int "MCO1 prescaler"
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depends on !CLOCK_STM32_MCO1_SRC_NOCLOCK
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default 1
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range 1 5
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help
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allowed values: 1, 2, 3, 4, 5
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choice
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prompt "STM32 MCO2 Clock Source"
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default CLOCK_STM32_MCO2_SRC_NOCLOCK
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config CLOCK_STM32_MCO2_SRC_NOCLOCK
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bool "NOCLOCK"
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help
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MCO2 output disabled, no clock on MCO2
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config CLOCK_STM32_MCO2_SRC_SYSCLK
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bool "SYSCLK"
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depends on SOC_SERIES_STM32F4X
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help
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Use SYSCLK as source of MCO2
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config CLOCK_STM32_MCO2_SRC_PLLI2S
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bool "PLLI2S"
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depends on SOC_SERIES_STM32F4X
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help
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Use PLLI2S as source of MCO2
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config CLOCK_STM32_MCO2_SRC_HSE
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bool "HSE"
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depends on SOC_SERIES_STM32F4X
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help
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Use HSE as source of MCO2
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config CLOCK_STM32_MCO2_SRC_PLLCLK
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bool "PLLCLK"
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depends on SOC_SERIES_STM32F4X
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help
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Use PLLCLK as source of MCO2
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endchoice
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config CLOCK_STM32_MCO2_DIV
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int "MCO2 prescaler"
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depends on !CLOCK_STM32_MCO2_SRC_NOCLOCK
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default 1
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range 1 5
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help
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allowed values: 1, 2, 3, 4, 5
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endif # CLOCK_CONTROL_STM32_CUBE
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