95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/*
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* Copyright (c) 2016, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "vreg.h"
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typedef enum { AON_VR = 0, PLAT3P3_VR, PLAT1P8_VR, HOST_VR, VREG_NUM } vreg_t;
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QM_RW uint32_t *vreg[VREG_NUM] = {
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&QM_SCSS_PMU->aon_vr, &QM_SCSS_PMU->plat3p3_vr, &QM_SCSS_PMU->plat1p8_vr,
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&QM_SCSS_PMU->host_vr};
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static int vreg_set_mode(const vreg_t id, const vreg_mode_t mode)
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{
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QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
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uint32_t vr;
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vr = *vreg[id];
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switch (mode) {
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case VREG_MODE_SWITCHING:
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vr |= QM_SCSS_VR_EN;
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vr &= ~QM_SCSS_VR_VREG_SEL;
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break;
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case VREG_MODE_LINEAR:
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vr |= QM_SCSS_VR_EN;
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vr |= QM_SCSS_VR_VREG_SEL;
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break;
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case VREG_MODE_SHUTDOWN:
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vr &= ~QM_SCSS_VR_EN;
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break;
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default:
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break;
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}
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*vreg[id] = vr;
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while ((mode == VREG_MODE_SWITCHING) &&
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(*vreg[id] & QM_SCSS_VR_ROK) == 0) {
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}
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return 0;
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}
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int vreg_aon_set_mode(const vreg_mode_t mode)
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{
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QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
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QM_CHECK(mode != VREG_MODE_SWITCHING, -EINVAL);
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return vreg_set_mode(AON_VR, mode);
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}
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int vreg_plat3p3_set_mode(const vreg_mode_t mode)
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{
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QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
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return vreg_set_mode(PLAT3P3_VR, mode);
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}
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int vreg_plat1p8_set_mode(const vreg_mode_t mode)
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{
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QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
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return vreg_set_mode(PLAT1P8_VR, mode);
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}
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int vreg_host_set_mode(const vreg_mode_t mode)
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{
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QM_CHECK(mode < VREG_MODE_NUM, -EINVAL);
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return vreg_set_mode(HOST_VR, mode);
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}
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