146 lines
4.0 KiB
C
146 lines
4.0 KiB
C
/*
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* Copyright (c) 2016, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __APIC_H__
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#define __APIC_H__
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#include <stdint.h>
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#include "qm_common.h"
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#include "qm_soc_regs.h"
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#define LAPIC_VECTOR_MASK (0xFF)
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static void _ioapic_set_redtbl_entry(unsigned int irq, uint64_t value)
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{
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unsigned int offset = QM_IOAPIC_REG_REDTBL + (irq * 2);
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QM_IOAPIC->ioregsel.reg = offset;
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QM_IOAPIC->iowin.reg = value & 0x00000000FFFFFFFF;
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QM_IOAPIC->ioregsel.reg = offset + 1;
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QM_IOAPIC->iowin.reg = (value & 0xFFFFFFFF00000000) >> 32;
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}
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/* Get redirection table size */
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static __inline__ int _ioapic_get_redtbl_size(void)
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{
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int max_entry_number;
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QM_IOAPIC->ioregsel.reg = QM_IOAPIC_REG_VER;
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max_entry_number = (QM_IOAPIC->iowin.reg & 0x00FF0000) >> 16;
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return max_entry_number + 1;
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}
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static uint32_t _ioapic_get_redtbl_entry_lo(unsigned int irq)
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{
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QM_IOAPIC->ioregsel.reg = QM_IOAPIC_REG_REDTBL + (irq * 2);
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return QM_IOAPIC->iowin.reg;
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}
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static void _ioapic_set_redtbl_entry_lo(unsigned int irq, uint32_t value)
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{
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QM_IOAPIC->ioregsel.reg = QM_IOAPIC_REG_REDTBL + (irq * 2);
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QM_IOAPIC->iowin.reg = value;
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}
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/*
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* Initialize Local and IOAPIC
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*/
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static __inline__ void apic_init(void)
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{
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int i;
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int size;
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/* Enable LAPIC */
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QM_LAPIC->svr.reg |= BIT(8);
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/* Set up LVT LINT0 to ExtINT and unmask it */
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QM_LAPIC->lvtlint0.reg |= (BIT(8) | BIT(9) | BIT(10));
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QM_LAPIC->lvtlint0.reg &= ~BIT(16);
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/* Clear up any spurious LAPIC interrupts */
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QM_LAPIC->eoi.reg = 0;
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/* Setup IOAPIC Redirection Table */
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size = _ioapic_get_redtbl_size();
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for (i = 0; i < size; i++) {
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_ioapic_set_redtbl_entry(i, BIT(16));
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}
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}
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static __inline__ void ioapic_register_irq(unsigned int irq,
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unsigned int vector)
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{
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uint32_t value;
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value = _ioapic_get_redtbl_entry_lo(irq);
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/* Assign vector and set polarity (positive). */
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value &= ~LAPIC_VECTOR_MASK;
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value |= (vector & LAPIC_VECTOR_MASK);
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value &= ~BIT(13);
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/* Set trigger mode. */
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switch (irq) {
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case QM_IRQ_RTC_0:
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case QM_IRQ_AONPT_0:
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case QM_IRQ_WDT_0:
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/* Edge sensitive. */
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value &= ~BIT(15);
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break;
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default:
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/* Level sensitive. */
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value |= BIT(15);
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break;
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}
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_ioapic_set_redtbl_entry_lo(irq, value);
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}
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static __inline__ void ioapic_mask_irq(unsigned int irq)
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{
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uint32_t value = _ioapic_get_redtbl_entry_lo(irq);
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value |= BIT(16);
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_ioapic_set_redtbl_entry_lo(irq, value);
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}
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static __inline__ void ioapic_unmask_irq(unsigned int irq)
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{
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uint32_t value = _ioapic_get_redtbl_entry_lo(irq);
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value &= ~BIT(16);
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_ioapic_set_redtbl_entry_lo(irq, value);
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}
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#endif /* __APIC_H__ */
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