106 lines
2.9 KiB
C
106 lines
2.9 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cortex-M public interrupt handling
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*
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* ARM-specific kernel interrupt handling interface. Included by arm/arch.h.
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*/
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#ifndef _ARCH_ARM_CORTEXM_IRQ_H_
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#define _ARCH_ARM_CORTEXM_IRQ_H_
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#include <irq.h>
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#include <sw_isr_table.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef _ASMLANGUAGE
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GTEXT(_IntExit);
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GTEXT(_arch_irq_enable)
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GTEXT(_arch_irq_disable)
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GTEXT(_arch_irq_is_enabled)
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#else
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extern void _arch_irq_enable(unsigned int irq);
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extern void _arch_irq_disable(unsigned int irq);
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extern int _arch_irq_is_enabled(unsigned int irq);
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extern void _IntExit(void);
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/* macros convert value of it's argument to a string */
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#define DO_TOSTR(s) #s
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#define TOSTR(s) DO_TOSTR(s)
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/* concatenate the values of the arguments into one */
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#define DO_CONCAT(x, y) x ## y
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#define CONCAT(x, y) DO_CONCAT(x, y)
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/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
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extern void _irq_priority_set(unsigned int irq, unsigned int prio,
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uint32_t flags);
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/* Flags for use with IRQ_CONNECT() */
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#if CONFIG_ZERO_LATENCY_IRQS
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/**
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* Set this interrupt up as a zero-latency IRQ. It has a fixed hardware
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* priority level (discarding what was supplied in the interrupt's priority
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* argument), and will run even if irq_lock() is active. Be careful!
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*/
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#define IRQ_ZERO_LATENCY (1 << 0)
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#endif
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/**
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* Configure a static interrupt.
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*
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* All arguments must be computable by the compiler at build time.
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*
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* Internally this function does a few things:
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*
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* 1. The enum statement has no effect but forces the compiler to only
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* accept constant values for the irq_p parameter, very important as the
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* numerical IRQ line is used to create a named section.
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*
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* 2. An instance of _IsrTableEntry is created containing the ISR and its
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* parameter. If you look at how _sw_isr_table is created, each entry in the
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* array is in its own section named by the IRQ line number. What we are doing
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* here is to override one of the default entries (which points to the
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* spurious IRQ handler) with what was supplied here.
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*
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* 3. The priority level for the interrupt is configured by a call to
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* _irq_priority_set()
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*
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* @param irq_p IRQ line number
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* @param priority_p Interrupt priority
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* @param isr_p Interrupt service routine
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* @param isr_param_p ISR parameter
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* @param flags_p IRQ options
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*
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* @return The vector assigned to this interrupt
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*/
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#define _ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
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({ \
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enum { IRQ = irq_p }; \
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static struct _IsrTableEntry _CONCAT(_isr_irq, irq_p) \
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__attribute__ ((used)) \
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__attribute__ ((section(STRINGIFY(_CONCAT(.gnu.linkonce.isr_irq, irq_p))))) = \
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{isr_param_p, isr_p}; \
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_irq_priority_set(irq_p, priority_p, flags_p); \
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irq_p; \
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})
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ARCH_ARM_CORTEXM_IRQ_H_ */
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