85 lines
1.8 KiB
C
85 lines
1.8 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_SPINLOCK_H_
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#define ZEPHYR_INCLUDE_SPINLOCK_H_
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#include <atomic.h>
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#if defined(CONFIG_ASSERT) && (CONFIG_MP_NUM_CPUS < 4)
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#include <kernel_structs.h>
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#define SPIN_VALIDATE
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#endif
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struct k_spinlock_key {
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int key;
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};
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typedef struct k_spinlock_key k_spinlock_key_t;
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struct k_spinlock {
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#ifdef CONFIG_SMP
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atomic_t locked;
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#endif
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#ifdef SPIN_VALIDATE
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/* Stores the thread that holds the lock with the locking CPU
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* ID in the bottom two bits.
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*/
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size_t thread_cpu;
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#endif
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};
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static ALWAYS_INLINE k_spinlock_key_t k_spin_lock(struct k_spinlock *l)
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{
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k_spinlock_key_t k;
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/* Note that we need to use the underlying arch-specific lock
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* implementation. The "irq_lock()" API in SMP context is
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* actually a wrapper for a global spinlock!
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*/
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k.key = _arch_irq_lock();
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#ifdef SPIN_VALIDATE
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if (l->thread_cpu) {
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__ASSERT((l->thread_cpu & 3) != _current_cpu->id,
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"Recursive spinlock");
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}
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l->thread_cpu = _current_cpu->id | (u32_t)_current;
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#endif
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#ifdef CONFIG_SMP
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while (!atomic_cas(&l->locked, 0, 1)) {
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}
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#endif
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return k;
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}
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static ALWAYS_INLINE void k_spin_unlock(struct k_spinlock *l,
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k_spinlock_key_t key)
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{
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#ifdef SPIN_VALIDATE
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__ASSERT(l->thread_cpu == (_current_cpu->id | (u32_t)_current),
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"Not my spinlock!");
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l->thread_cpu = 0;
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#endif
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#ifdef CONFIG_SMP
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/* Strictly we don't need atomic_clear() here (which is an
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* exchange operation that returns the old value). We are always
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* setting a zero and (because we hold the lock) know the existing
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* state won't change due to a race. But some architectures need
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* a memory barrier when used like this, and we don't have a
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* Zephyr framework for that.
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*/
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atomic_clear(&l->locked);
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#endif
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_arch_irq_unlock(key.key);
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}
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#endif /* ZEPHYR_INCLUDE_SPINLOCK_H_ */
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