440 lines
9.6 KiB
Plaintext
440 lines
9.6 KiB
Plaintext
#include <arm/armv7-m.dtsi>
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#include <dt-bindings/clock/kinetis_sim.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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/* The on-chip SRAM is split into SRAM_L and SRAM_U regions that form a
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* contiguous block in the memory map, however misaligned accesses
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* across the 0x2000_0000 boundary are not supported in the Arm
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* Cortex-M4 architecture. For clarity and to avoid the temptation for
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* someone to extend sram0 without solving this issue, we define two
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* separate memory nodes here and only use the upper one for now. A
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* potential solution has been proposed in binutils:
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* https://sourceware.org/ml/binutils/2017-02/msg00250.html
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*/
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sram_l: memory@1fff0000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x1fff0000 0x10000>;
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20000000 0x30000>;
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};
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soc {
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mpu@4000d000 {
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compatible = "nxp,k64f-mpu";
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reg = <0x4000d000 0x824>;
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status = "disabled";
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};
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mcg: clock-controller@40064000 {
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compatible = "nxp,k64f-mcg";
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reg = <0x40064000 0xd>;
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system-clock-frequency = <120000000>;
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clock-controller;
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};
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clock-controller@40065000 {
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compatible = "nxp,k64f-osc";
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reg = <0x40065000 0x4>;
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enable-external-reference;
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};
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rtc@4003d000 {
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compatible = "nxp,k64f-rtc";
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reg = <0x4003d000 0x808>;
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clock-frequency = <32768>;
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};
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sim: sim@40047000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40047000 0x1060>;
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label = "SIM";
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clk-divider-core = <1>;
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clk-divider-bus = <2>;
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clk-divider-flexbus = <3>;
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clk-divider-flash = <5>;
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clock-controller;
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#clock-cells = <3>;
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};
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flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfe";
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label = "FLASH_CTRL";
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reg = <0x40020000 0x18>;
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interrupts = <18 0>, <19 0>;
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interrupt-names = "command-complete", "read-collision";
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "MCUX_FLASH";
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reg = <0 0x100000>;
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erase-block-size = <4096>;
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write-block-size = <8>;
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};
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <24 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <25 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
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label = "I2C_1";
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status = "disabled";
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};
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i2c2: i2c@400e6000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400e6000 0x1000>;
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interrupts = <74 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 6>;
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label = "I2C_2";
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status = "disabled";
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};
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uart0: uart@4006a000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006a000 0x1000>;
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interrupts = <31 0>, <32 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 10>;
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label = "UART_0";
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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status = "disabled";
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};
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uart1: uart@4006b000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006b000 0x1000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 11>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: uart@4006c000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006c000 0x1000>;
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interrupts = <35 0>, <36 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 12>;
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label = "UART_2";
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status = "disabled";
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};
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uart3: uart@4006d000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x4006d000 0x1000>;
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interrupts = <37 0>, <38 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 13>;
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label = "UART_3";
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status = "disabled";
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};
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uart4: uart@400ea000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x400ea000 0x1000>;
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interrupts = <66 0>, <67 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 10>;
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label = "UART_4";
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status = "disabled";
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};
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uart5: uart@400eb000 {
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compatible = "nxp,kinetis-uart";
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reg = <0x400eb000 0x1000>;
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interrupts = <68 0>, <69 0>;
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interrupt-names = "status", "error";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 11>;
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label = "UART_5";
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status = "disabled";
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};
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pinmux_a: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0xd0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
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};
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pinmux_b: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0xd0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
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uart0_default: uart0_default {
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rx-tx {
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pins = <16>, <17>;
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function = <3>;
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};
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};
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uart0_lpm: uart0_lpm {
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rx-tx {
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pins = <16>, <17>;
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function = <0>;
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};
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};
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spi0_default: spi0_default {
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miso-mosi-clk {
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pins = <10>, <9>;
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function = <2>;
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};
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};
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};
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pinmux_c: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0xd0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
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};
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pinmux_d: pinmux@4004c000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004c000 0xd0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
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};
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pinmux_e: pinmux@4004d000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004d000 0xd0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff000 0x40>;
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interrupts = <59 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff040 0x40>;
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interrupts = <60 2>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff080 0x40>;
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interrupts = <61 2>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff0c0 0x40>;
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interrupts = <62 2>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff100 0x40>;
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interrupts = <63 2>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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};
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spi0: spi@4002c000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002c000 0x88>;
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interrupts = <26 3>;
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label = "SPI_0";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&spi0_default>;
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pinctrl-names = "default";
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};
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spi1: spi@4002d000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002d000 0x88>;
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interrupts = <27 3>;
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label = "SPI_1";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 13>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@400ac000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x400ac000 0x88>;
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interrupts = <65 3>;
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label = "SPI_2";
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1030 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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wdog: watchdog@40052000 {
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compatible = "nxp,kinetis-wdog";
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reg = <0x40052000 16>;
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interrupts = <22 0>;
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clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>;
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label = "WDT_0";
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clock-source = <0>; /* LPO 1kHz or other source */
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reload-counter = <40000>;
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start-on-boot;
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prescaler = <2>;
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};
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pwm0: pwm@40038000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x40038000 0x98>;
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interrupts = <42 0>;
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label = "PWM_0";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm1: pwm@40039000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x40039000 0x98>;
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interrupts = <43 0>;
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label = "PWM_1";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm2: pwm@4003a000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x4003a000 0x98>;
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interrupts = <44 0>;
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label = "PWM_2";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm3: pwm@400b9000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x400b9000 0x98>;
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interrupts = <71 0>;
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label = "PWM_3";
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status = "disabled";
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#pwm-cells = <2>;
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <39 0>;
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label = "ADC_0";
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status = "disabled";
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};
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adc1: adc@400bb000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x400bb000 0x70>;
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interrupts = <73 0>;
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label = "ADC_1";
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status = "disabled";
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};
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usbd: usbd@40072000 {
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compatible = "nxp,kinetis-usbd";
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reg = <0x40072000 0x1000>;
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interrupts = <53 1>;
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interrupt-names = "usb_otg";
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num-bidir-endpoints = <16>;
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status = "disabled";
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label = "USBD";
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};
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eth: ethernet@400c0004 {
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compatible = "nxp,kinetis-ethernet";
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reg = <0x400c0004 0x620>;
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interrupts = <83 0>, <84 0>, <85 0>;
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interrupts-names = "TX", "RX", "ERR_MISC";
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status = "disabled";
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local-mac-address = [00 00 00 00 00 00];
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label = "ETH_0";
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ptp {
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compatible = "nxp,kinetis-ptp";
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status = "disabled";
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interrupts = <82 0>;
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interrupts-names = "IEEE1588_TMR";
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};
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};
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rnga: random@40029000 {
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compatible = "nxp,kinetis-rnga";
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reg = <0x40029000 0x1000>;
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status = "ok";
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interrupts = <23 0>;
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label = "RNGA";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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