245 lines
6.6 KiB
C
245 lines
6.6 KiB
C
/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* Based on:
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* sam0_rtc_timer.c Copyright (c) 2018 omSquare s.r.o.
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* intel_adsp_timer.c Copyright (c) 2020 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT silabs_gecko_burtc
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/**
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* @file
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* @brief SiLabs Gecko BURTC-based sys_clock driver
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*
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*/
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#include <zephyr/init.h>
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#include <soc.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/irq.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/logging/log.h>
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#include "em_device.h"
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#include "em_cmu.h"
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#include "em_burtc.h"
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LOG_MODULE_REGISTER(gecko_burtc_timer);
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/* Maximum time interval between timer interrupts (in hw_cycles) */
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#define MAX_TIMEOUT_CYC (UINT32_MAX >> 1)
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/*
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* Mininum time interval between now and IRQ firing that can be scheduled.
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* The main cause for this is LFSYNC register update, which requires several
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* LF clk cycles for synchronization.
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* Seee e.g. "4.2.4.4.4 LFSYNC Registers" in "EFR32xG22 Reference Manual"
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*/
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#define MIN_DELAY_CYC (6u)
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#define TIMER_IRQ (DT_INST_IRQN(0))
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#if defined(CONFIG_TEST)
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/* See tests/kernel/context */
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const int32_t z_sys_timer_irq_for_test = TIMER_IRQ;
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#endif
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/* With CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME, that's where we
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* should write hw_cycles timer clock frequency upon init
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*/
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extern int z_clock_hw_cycles_per_sec;
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/* Number of hw_cycles clocks per 1 kernel tick */
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static uint32_t g_cyc_per_tick;
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/* MAX_TIMEOUT_CYC expressed as ticks */
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static uint32_t g_max_timeout_ticks;
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/* Value of BURTC counter when the previous kernel tick was announced */
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static atomic_t g_last_count;
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/* Spinlock to sync between Compare ISR and update of Compare register */
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static struct k_spinlock g_lock;
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/* Set to true when timer is initialized */
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static bool g_init;
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static void burtc_isr(const void *arg)
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{
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ARG_UNUSED(arg);
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/* Clear the interrupt */
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BURTC_IntClear(BURTC_IF_COMP);
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uint32_t curr = BURTC_CounterGet();
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/* NOTE: this is the only place where g_last_count is modified,
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* so we don't need to do make the whole read-and-modify atomic, just
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* writing it behind the memory barrier is enough
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*/
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uint32_t prev = atomic_get(&g_last_count);
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/* How many ticks have we not announced since the last announcement */
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uint32_t unannounced = (curr - prev) / g_cyc_per_tick;
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atomic_set(&g_last_count, prev + unannounced * g_cyc_per_tick);
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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/* Counter value on which announcement should be made */
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uint32_t next = prev + g_cyc_per_tick;
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/* `next` can be too close in the future since we're trying to
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* announce the very next tick - in that case we skip one and
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* announce the one after it instead
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*/
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if ((next - curr) < MIN_DELAY_CYC) {
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next += g_cyc_per_tick;
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}
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BURTC_CompareSet(0, next);
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}
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sys_clock_announce(unannounced);
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}
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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return;
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}
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/*
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* calculate 'ticks' value that specifies which tick to announce,
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* beginning from the closest upcoming one:
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* 0 - announce upcoming tick itself
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* 1 - skip upcoming one, but announce the one after it, etc.
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*/
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ticks = (ticks == K_TICKS_FOREVER) ? g_max_timeout_ticks : ticks;
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ticks = CLAMP(ticks - 1, 0, g_max_timeout_ticks);
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k_spinlock_key_t key = k_spin_lock(&g_lock);
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uint32_t curr = BURTC_CounterGet();
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uint32_t prev = atomic_get(&g_last_count);
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/* How many ticks have we not announced since the last announcement */
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uint32_t unannounced = (curr - prev) / g_cyc_per_tick;
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/* Which tick to announce (counting from the last announced one) */
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uint32_t to_announce = unannounced + ticks + 1;
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/* Force maximum interval between announcements. If we sit without
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* announcements for too long, counter will roll over and we'll lose
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* track of unannounced ticks.
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*/
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to_announce = MIN(to_announce, g_max_timeout_ticks);
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/* Counter value on which announcement should be made */
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uint32_t next = prev + to_announce * g_cyc_per_tick;
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/* `next` can be too close in the future if we're trying to announce
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* the very next tick - in that case we skip one and announce the one
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* after it instead
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*/
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if ((next - curr) < MIN_DELAY_CYC) {
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next += g_cyc_per_tick;
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}
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BURTC_CompareSet(0, next);
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k_spin_unlock(&g_lock, key);
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}
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uint32_t sys_clock_elapsed(void)
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{
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL) || !g_init) {
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return 0;
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} else {
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return (BURTC_CounterGet() - g_last_count) / g_cyc_per_tick;
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}
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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/* API note: this function is unrelated to kernel ticks, it returns
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* a value of some 32-bit hw_cycles counter which counts with
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* z_clock_hw_cycles_per_sec frequency
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*/
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if (!g_init) {
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return 0;
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} else {
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return BURTC_CounterGet();
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}
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}
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static int burtc_init(void)
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{
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uint32_t hw_clock_freq;
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BURTC_Init_TypeDef init = BURTC_INIT_DEFAULT;
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/* Enable clock for BURTC CSRs on APB */
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CMU_ClockEnable(cmuClock_BURTC, true);
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/* Configure BURTC LF clocksource according to Kconfig */
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#if defined(CONFIG_CMU_BURTCCLK_LFXO)
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CMU_ClockSelectSet(cmuClock_BURTC, cmuSelect_LFXO);
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#elif defined(CONFIG_CMU_BURTCCLK_LFRCO)
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CMU_ClockSelectSet(cmuClock_BURTC, cmuSelect_LFRCO);
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#elif defined(CONFIG_CMU_BURTCCLK_ULFRCO)
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CMU_ClockSelectSet(cmuClock_BURTC, cmuSelect_ULFRCO);
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#else
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#error "Unsupported BURTC clock specified"
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#endif
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/* Calculate timing constants and init BURTC */
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hw_clock_freq = CMU_ClockFreqGet(cmuClock_BURTC);
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z_clock_hw_cycles_per_sec = hw_clock_freq;
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BUILD_ASSERT(CONFIG_SYS_CLOCK_TICKS_PER_SEC > 0,
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"Invalid CONFIG_SYS_CLOCK_TICKS_PER_SEC value");
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g_cyc_per_tick = hw_clock_freq / CONFIG_SYS_CLOCK_TICKS_PER_SEC;
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__ASSERT(g_cyc_per_tick >= MIN_DELAY_CYC,
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"%u cycle-long tick is too short to be scheduled "
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"(min is %u). Config: SYS_CLOCK_TICKS_PER_SEC is "
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"%d and timer frequency is %u",
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g_cyc_per_tick, MIN_DELAY_CYC, CONFIG_SYS_CLOCK_TICKS_PER_SEC,
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hw_clock_freq);
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g_max_timeout_ticks = MAX_TIMEOUT_CYC / g_cyc_per_tick;
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init.clkDiv = 1;
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init.start = false;
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BURTC_Init(&init);
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g_init = true;
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/* Enable compare match interrupt */
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BURTC_IntClear(BURTC_IF_COMP);
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BURTC_IntEnable(BURTC_IF_COMP);
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NVIC_ClearPendingIRQ(TIMER_IRQ);
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IRQ_CONNECT(TIMER_IRQ, DT_INST_IRQ(0, priority), burtc_isr, 0, 0);
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irq_enable(TIMER_IRQ);
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/* Start the timer and announce 1 kernel tick */
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atomic_set(&g_last_count, 0);
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BURTC_CompareSet(0, g_cyc_per_tick);
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BURTC_SyncWait();
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BURTC->CNT = 0;
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BURTC_Start();
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return 0;
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}
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SYS_INIT(burtc_init, PRE_KERNEL_2,
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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