63 lines
2.3 KiB
Plaintext
63 lines
2.3 KiB
Plaintext
# Copyright (c) 2014-2015 Wind River Systems, Inc.
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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# Copyright (c) 2019 Intel Corp.
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# SPDX-License-Identifier: Apache-2.0
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DT_CHOSEN_IDLE_TIMER := zephyr,cortex-m-idle-timer
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config CORTEX_M_SYSTICK
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bool "Cortex-M SYSTICK timer"
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depends on CPU_CORTEX_M_HAS_SYSTICK
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default y
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depends on DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED || \
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DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED || \
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DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED || \
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DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED
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select TICKLESS_CAPABLE
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select SYSTEM_TIMER_HAS_DISABLE_SUPPORT
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select CORTEX_M_SYSTICK_INSTALL_ISR
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help
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This module implements a kernel device driver for the Cortex-M processor
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SYSTICK timer and provides the standard "system clock driver" interfaces.
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config CORTEX_M_SYSTICK_INSTALL_ISR
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bool
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depends on CPU_CORTEX_M_HAS_SYSTICK
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help
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This option should be selected by SysTick-based drivers so that the
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sys_clock_isr() function is installed.
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config CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER
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bool "Cortex-M SYSTICK timer with sys_clock_cycle_get_64() support"
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depends on CORTEX_M_SYSTICK
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default y if (SYS_CLOCK_HW_CYCLES_PER_SEC > 60000000)
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select TIMER_HAS_64BIT_CYCLE_COUNTER
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help
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This driver, due to its limited 24-bits hardware counter, is already
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tracking a separate cycle count in software. This option make that
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count a 64-bits value to support sys_clock_cycle_get_64().
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This is cheap to do as expensive math operations (i.e. divisions)
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are performed only on counter interval values that always fit in
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32 bits.
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This is set to y by default when the hardware clock is fast enough
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to wrap sys_clock_cycle_get_32() in about a minute or less.
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config CORTEX_M_SYSTICK_IDLE_TIMER
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bool "Use an additional timer while entering IDLE"
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default $(dt_chosen_enabled,$(DT_CHOSEN_IDLE_TIMER))
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depends on COUNTER
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depends on TICKLESS_KERNEL
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depends on PM
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help
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There are chips e.g. STMFX family that use SysTick as a system timer,
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but SysTick is not clocked in low power mode. These chips usually have
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another timer that is not stopped, but it has lower frequency e.g.
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RTC, thus it can't be used as a main system timer.
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Use the IDLE timer for timeout (wakeup) when the system is entering
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IDLE state.
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The chosen IDLE timer node has to support setting alarm from the
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counter API.
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