1150 lines
28 KiB
C
1150 lines
28 KiB
C
/*
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* Copyright (c) 2016-2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Driver for Nordic Semiconductor nRF5X UART
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*/
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/uart.h>
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#include <zephyr/pm/device.h>
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#include <zephyr/irq.h>
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#include <soc.h>
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#include <hal/nrf_uart.h>
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/*
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* Extract information from devicetree.
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*
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* This driver only supports one instance of this IP block, so the
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* instance number is always 0.
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*/
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#define DT_DRV_COMPAT nordic_nrf_uart
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#define PROP(prop) DT_INST_PROP(0, prop)
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#define HAS_PROP(prop) DT_INST_NODE_HAS_PROP(0, prop)
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#define BAUDRATE PROP(current_speed)
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#define DISABLE_RX PROP(disable_rx)
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#define HW_FLOW_CONTROL_AVAILABLE PROP(hw_flow_control)
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#define IRQN DT_INST_IRQN(0)
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#define IRQ_PRIO DT_INST_IRQ(0, priority)
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static NRF_UART_Type *const uart0_addr = (NRF_UART_Type *)DT_INST_REG_ADDR(0);
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struct uart_nrfx_config {
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const struct pinctrl_dev_config *pcfg;
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};
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/* Device data structure */
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struct uart_nrfx_data {
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struct uart_config uart_config;
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};
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#ifdef CONFIG_UART_0_ASYNC
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static struct {
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uart_callback_t callback;
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void *user_data;
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uint8_t *rx_buffer;
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uint8_t *rx_secondary_buffer;
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size_t rx_buffer_length;
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size_t rx_secondary_buffer_length;
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volatile size_t rx_counter;
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volatile size_t rx_offset;
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int32_t rx_timeout;
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struct k_timer rx_timeout_timer;
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bool rx_enabled;
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bool tx_abort;
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const uint8_t *volatile tx_buffer;
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/* note: this is aliased with atomic_t in uart_nrfx_poll_out() */
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unsigned long tx_buffer_length;
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volatile size_t tx_counter;
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#if HW_FLOW_CONTROL_AVAILABLE
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int32_t tx_timeout;
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struct k_timer tx_timeout_timer;
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#endif
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} uart0_cb;
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#endif /* CONFIG_UART_0_ASYNC */
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#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
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static uart_irq_callback_user_data_t irq_callback; /**< Callback function pointer */
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static void *irq_cb_data; /**< Callback function arg */
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/* Variable used to override the state of the TXDRDY event in the initial state
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* of the driver. This event is not set by the hardware until a first byte is
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* sent, and we want to use it as an indication if the transmitter is ready
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* to accept a new byte.
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*/
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static volatile uint8_t uart_sw_event_txdrdy;
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static volatile bool disable_tx_irq;
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#endif /* CONFIG_UART_0_INTERRUPT_DRIVEN */
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static bool event_txdrdy_check(void)
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{
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return (nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_TXDRDY)
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#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
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|| uart_sw_event_txdrdy
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#endif
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);
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}
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static void event_txdrdy_clear(void)
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{
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_TXDRDY);
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#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
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uart_sw_event_txdrdy = 0U;
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#endif
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}
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/**
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* @brief Set the baud rate
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*
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* This routine set the given baud rate for the UART.
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*
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* @param dev UART device struct
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* @param baudrate Baud rate
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*
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* @retval 0 on success.
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* @retval -EINVAL for invalid baudrate.
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*/
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static int baudrate_set(const struct device *dev, uint32_t baudrate)
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{
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nrf_uart_baudrate_t nrf_baudrate; /* calculated baudrate divisor */
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switch (baudrate) {
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case 300:
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/* value not supported by Nordic HAL */
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nrf_baudrate = 0x00014000;
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break;
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case 600:
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/* value not supported by Nordic HAL */
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nrf_baudrate = 0x00027000;
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break;
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case 1200:
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nrf_baudrate = NRF_UART_BAUDRATE_1200;
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break;
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case 2400:
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nrf_baudrate = NRF_UART_BAUDRATE_2400;
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break;
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case 4800:
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nrf_baudrate = NRF_UART_BAUDRATE_4800;
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break;
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case 9600:
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nrf_baudrate = NRF_UART_BAUDRATE_9600;
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break;
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case 14400:
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nrf_baudrate = NRF_UART_BAUDRATE_14400;
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break;
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case 19200:
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nrf_baudrate = NRF_UART_BAUDRATE_19200;
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break;
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case 28800:
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nrf_baudrate = NRF_UART_BAUDRATE_28800;
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break;
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#if defined(UART_BAUDRATE_BAUDRATE_Baud31250)
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case 31250:
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nrf_baudrate = NRF_UART_BAUDRATE_31250;
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break;
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#endif
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case 38400:
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nrf_baudrate = NRF_UART_BAUDRATE_38400;
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break;
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#if defined(UART_BAUDRATE_BAUDRATE_Baud56000)
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case 56000:
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nrf_baudrate = NRF_UART_BAUDRATE_56000;
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break;
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#endif
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case 57600:
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nrf_baudrate = NRF_UART_BAUDRATE_57600;
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break;
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case 76800:
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nrf_baudrate = NRF_UART_BAUDRATE_76800;
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break;
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case 115200:
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nrf_baudrate = NRF_UART_BAUDRATE_115200;
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break;
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case 230400:
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nrf_baudrate = NRF_UART_BAUDRATE_230400;
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break;
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case 250000:
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nrf_baudrate = NRF_UART_BAUDRATE_250000;
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break;
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case 460800:
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nrf_baudrate = NRF_UART_BAUDRATE_460800;
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break;
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case 921600:
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nrf_baudrate = NRF_UART_BAUDRATE_921600;
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break;
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case 1000000:
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nrf_baudrate = NRF_UART_BAUDRATE_1000000;
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break;
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default:
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return -EINVAL;
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}
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nrf_uart_baudrate_set(uart0_addr, nrf_baudrate);
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return 0;
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}
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/**
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* @brief Poll the device for input.
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*
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* @param dev UART device struct
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* @param c Pointer to character
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*
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* @return 0 if a character arrived, -1 if the input buffer if empty.
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*/
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static int uart_nrfx_poll_in(const struct device *dev, unsigned char *c)
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{
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if (!nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXDRDY)) {
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return -1;
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}
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/* Clear the interrupt */
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXDRDY);
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/* got a character */
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*c = nrf_uart_rxd_get(uart0_addr);
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return 0;
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}
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#ifdef CONFIG_UART_0_ASYNC
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static void uart_nrfx_isr(const struct device *dev);
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#endif
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/**
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* @brief Output a character in polled mode.
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*
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* @param dev UART device struct
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* @param c Character to send
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*/
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static void uart_nrfx_poll_out(const struct device *dev, unsigned char c)
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{
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atomic_t *lock;
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#ifdef CONFIG_UART_0_ASYNC
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while (uart0_cb.tx_buffer) {
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/* If there is ongoing asynchronous transmission, and we are in
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* ISR, then call uart interrupt routine, otherwise
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* busy wait until transmission is finished.
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*/
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if (k_is_in_isr()) {
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uart_nrfx_isr(dev);
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}
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}
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/* Use tx_buffer_length as lock, this way uart_nrfx_tx will
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* return -EBUSY during poll_out.
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*/
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lock = &uart0_cb.tx_buffer_length;
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#else
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static atomic_val_t poll_out_lock;
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lock = &poll_out_lock;
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#endif
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if (!k_is_in_isr()) {
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uint8_t safety_cnt = 100;
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while (atomic_cas((atomic_t *) lock,
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(atomic_val_t) 0,
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(atomic_val_t) 1) == false) {
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if (IS_ENABLED(CONFIG_MULTITHREADING)) {
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/* k_sleep allows other threads to execute and finish
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* their transactions.
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*/
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k_msleep(1);
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} else {
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k_busy_wait(1000);
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}
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if (--safety_cnt == 0) {
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break;
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}
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}
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} else {
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*lock = 1;
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}
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/* Reset the transmitter ready state. */
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event_txdrdy_clear();
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/* Activate the transmitter. */
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTTX);
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/* Send the provided character. */
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nrf_uart_txd_set(uart0_addr, (uint8_t)c);
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/* Wait until the transmitter is ready, i.e. the character is sent. */
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bool res;
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NRFX_WAIT_FOR(event_txdrdy_check(), 1000, 1, res);
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/* Deactivate the transmitter so that it does not needlessly
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* consume power.
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*/
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPTX);
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/* Release the lock. */
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*lock = 0;
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}
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/** Console I/O function */
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static int uart_nrfx_err_check(const struct device *dev)
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{
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/* register bitfields maps to the defines in uart.h */
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return nrf_uart_errorsrc_get_and_clear(uart0_addr);
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}
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static int uart_nrfx_configure(const struct device *dev,
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const struct uart_config *cfg)
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{
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struct uart_nrfx_data *data = dev->data;
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nrf_uart_config_t uart_cfg;
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#if defined(UART_CONFIG_STOP_Msk)
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switch (cfg->stop_bits) {
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case UART_CFG_STOP_BITS_1:
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uart_cfg.stop = NRF_UART_STOP_ONE;
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break;
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case UART_CFG_STOP_BITS_2:
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uart_cfg.stop = NRF_UART_STOP_TWO;
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break;
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default:
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return -ENOTSUP;
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}
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#else
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if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
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return -ENOTSUP;
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}
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#endif
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if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
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return -ENOTSUP;
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}
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switch (cfg->flow_ctrl) {
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case UART_CFG_FLOW_CTRL_NONE:
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uart_cfg.hwfc = NRF_UART_HWFC_DISABLED;
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break;
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case UART_CFG_FLOW_CTRL_RTS_CTS:
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if (HW_FLOW_CONTROL_AVAILABLE) {
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uart_cfg.hwfc = NRF_UART_HWFC_ENABLED;
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} else {
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return -ENOTSUP;
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}
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break;
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default:
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return -ENOTSUP;
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}
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#if defined(UART_CONFIG_PARITYTYPE_Msk)
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uart_cfg.paritytype = NRF_UART_PARITYTYPE_EVEN;
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#endif
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switch (cfg->parity) {
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case UART_CFG_PARITY_NONE:
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uart_cfg.parity = NRF_UART_PARITY_EXCLUDED;
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break;
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case UART_CFG_PARITY_EVEN:
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uart_cfg.parity = NRF_UART_PARITY_INCLUDED;
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break;
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#if defined(UART_CONFIG_PARITYTYPE_Msk)
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case UART_CFG_PARITY_ODD:
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uart_cfg.parity = NRF_UART_PARITY_INCLUDED;
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uart_cfg.paritytype = NRF_UART_PARITYTYPE_ODD;
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break;
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#endif
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default:
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return -ENOTSUP;
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}
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if (baudrate_set(dev, cfg->baudrate) != 0) {
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return -ENOTSUP;
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}
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nrf_uart_configure(uart0_addr, &uart_cfg);
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data->uart_config = *cfg;
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return 0;
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}
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
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static int uart_nrfx_config_get(const struct device *dev,
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struct uart_config *cfg)
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{
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struct uart_nrfx_data *data = dev->data;
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*cfg = data->uart_config;
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return 0;
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}
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#endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */
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#ifdef CONFIG_UART_0_ASYNC
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static void user_callback(const struct device *dev, struct uart_event *event)
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{
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if (uart0_cb.callback) {
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uart0_cb.callback(dev, event, uart0_cb.user_data);
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}
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}
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static int uart_nrfx_callback_set(const struct device *dev,
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uart_callback_t callback,
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void *user_data)
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{
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uart0_cb.callback = callback;
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uart0_cb.user_data = user_data;
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#if defined(CONFIG_UART_EXCLUSIVE_API_CALLBACKS) && defined(CONFIG_UART_0_INTERRUPT_DRIVEN)
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irq_callback = NULL;
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irq_cb_data = NULL;
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#endif
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return 0;
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}
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static int uart_nrfx_tx(const struct device *dev, const uint8_t *buf,
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size_t len,
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int32_t timeout)
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{
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if (atomic_cas((atomic_t *) &uart0_cb.tx_buffer_length,
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(atomic_val_t) 0,
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(atomic_val_t) len) == false) {
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return -EBUSY;
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}
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uart0_cb.tx_buffer = buf;
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#if HW_FLOW_CONTROL_AVAILABLE
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uart0_cb.tx_timeout = timeout;
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#endif
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_TXDRDY);
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTTX);
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nrf_uart_int_enable(uart0_addr, NRF_UART_INT_MASK_TXDRDY);
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uint8_t txd = uart0_cb.tx_buffer[uart0_cb.tx_counter];
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nrf_uart_txd_set(uart0_addr, txd);
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return 0;
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}
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static int uart_nrfx_tx_abort(const struct device *dev)
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{
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if (uart0_cb.tx_buffer_length == 0) {
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return -EINVAL;
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}
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#if HW_FLOW_CONTROL_AVAILABLE
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if (uart0_cb.tx_timeout != SYS_FOREVER_US) {
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k_timer_stop(&uart0_cb.tx_timeout_timer);
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}
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#endif
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPTX);
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struct uart_event evt = {
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.type = UART_TX_ABORTED,
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.data.tx.buf = uart0_cb.tx_buffer,
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.data.tx.len = uart0_cb.tx_counter
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};
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uart0_cb.tx_buffer_length = 0;
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uart0_cb.tx_counter = 0;
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user_callback(dev, &evt);
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return 0;
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}
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static int uart_nrfx_rx_enable(const struct device *dev, uint8_t *buf,
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size_t len,
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int32_t timeout)
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{
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if (DISABLE_RX) {
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__ASSERT(false, "TX only UART instance");
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return -ENOTSUP;
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}
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if (uart0_cb.rx_buffer_length != 0) {
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return -EBUSY;
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}
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uart0_cb.rx_enabled = 1;
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uart0_cb.rx_buffer = buf;
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uart0_cb.rx_buffer_length = len;
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uart0_cb.rx_counter = 0;
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uart0_cb.rx_secondary_buffer_length = 0;
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uart0_cb.rx_timeout = timeout;
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_ERROR);
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXDRDY);
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nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXTO);
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nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTRX);
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nrf_uart_int_enable(uart0_addr, NRF_UART_INT_MASK_RXDRDY |
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NRF_UART_INT_MASK_ERROR |
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NRF_UART_INT_MASK_RXTO);
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return 0;
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}
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static int uart_nrfx_rx_buf_rsp(const struct device *dev, uint8_t *buf,
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size_t len)
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{
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int err;
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unsigned int key = irq_lock();
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if (!uart0_cb.rx_enabled) {
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err = -EACCES;
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} else if (uart0_cb.rx_secondary_buffer_length != 0) {
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err = -EBUSY;
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} else {
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uart0_cb.rx_secondary_buffer = buf;
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uart0_cb.rx_secondary_buffer_length = len;
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err = 0;
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}
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irq_unlock(key);
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return err;
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}
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static int uart_nrfx_rx_disable(const struct device *dev)
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{
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if (uart0_cb.rx_buffer_length == 0) {
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return -EFAULT;
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|
}
|
|
|
|
uart0_cb.rx_enabled = 0;
|
|
if (uart0_cb.rx_timeout != SYS_FOREVER_US) {
|
|
k_timer_stop(&uart0_cb.rx_timeout_timer);
|
|
}
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPRX);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rx_rdy_evt(const struct device *dev)
|
|
{
|
|
struct uart_event event;
|
|
size_t rx_cnt = uart0_cb.rx_counter;
|
|
|
|
event.type = UART_RX_RDY;
|
|
event.data.rx.buf = uart0_cb.rx_buffer;
|
|
event.data.rx.len = rx_cnt - uart0_cb.rx_offset;
|
|
event.data.rx.offset = uart0_cb.rx_offset;
|
|
|
|
uart0_cb.rx_offset = rx_cnt;
|
|
|
|
user_callback(dev, &event);
|
|
}
|
|
|
|
static void buf_released_evt(const struct device *dev)
|
|
{
|
|
struct uart_event event = {
|
|
.type = UART_RX_BUF_RELEASED,
|
|
.data.rx_buf.buf = uart0_cb.rx_buffer
|
|
};
|
|
user_callback(dev, &event);
|
|
}
|
|
|
|
static void rx_disabled_evt(const struct device *dev)
|
|
{
|
|
struct uart_event event = {
|
|
.type = UART_RX_DISABLED
|
|
};
|
|
user_callback(dev, &event);
|
|
}
|
|
|
|
static void rx_reset_state(void)
|
|
{
|
|
nrf_uart_int_disable(uart0_addr,
|
|
NRF_UART_INT_MASK_RXDRDY |
|
|
NRF_UART_INT_MASK_ERROR |
|
|
NRF_UART_INT_MASK_RXTO);
|
|
uart0_cb.rx_buffer_length = 0;
|
|
uart0_cb.rx_enabled = 0;
|
|
uart0_cb.rx_counter = 0;
|
|
uart0_cb.rx_offset = 0;
|
|
uart0_cb.rx_secondary_buffer_length = 0;
|
|
}
|
|
|
|
static void rx_isr(const struct device *dev)
|
|
{
|
|
struct uart_event event;
|
|
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXDRDY);
|
|
|
|
if (!uart0_cb.rx_buffer_length || !uart0_cb.rx_enabled) {
|
|
/* Byte received when receiving is disabled - data lost. */
|
|
nrf_uart_rxd_get(uart0_addr);
|
|
} else {
|
|
if (uart0_cb.rx_counter == 0 &&
|
|
uart0_cb.rx_secondary_buffer_length == 0) {
|
|
event.type = UART_RX_BUF_REQUEST;
|
|
user_callback(dev, &event);
|
|
}
|
|
uart0_cb.rx_buffer[uart0_cb.rx_counter] =
|
|
nrf_uart_rxd_get(uart0_addr);
|
|
uart0_cb.rx_counter++;
|
|
if (uart0_cb.rx_timeout == 0) {
|
|
rx_rdy_evt(dev);
|
|
} else if (uart0_cb.rx_timeout != SYS_FOREVER_US) {
|
|
k_timer_start(&uart0_cb.rx_timeout_timer,
|
|
K_USEC(uart0_cb.rx_timeout),
|
|
K_NO_WAIT);
|
|
}
|
|
}
|
|
|
|
if (uart0_cb.rx_buffer_length == uart0_cb.rx_counter) {
|
|
if (uart0_cb.rx_timeout != SYS_FOREVER_US) {
|
|
k_timer_stop(&uart0_cb.rx_timeout_timer);
|
|
}
|
|
rx_rdy_evt(dev);
|
|
|
|
unsigned int key = irq_lock();
|
|
|
|
if (uart0_cb.rx_secondary_buffer_length == 0) {
|
|
uart0_cb.rx_enabled = 0;
|
|
}
|
|
irq_unlock(key);
|
|
|
|
if (uart0_cb.rx_secondary_buffer_length) {
|
|
buf_released_evt(dev);
|
|
/* Switch to secondary buffer. */
|
|
uart0_cb.rx_buffer_length =
|
|
uart0_cb.rx_secondary_buffer_length;
|
|
uart0_cb.rx_buffer = uart0_cb.rx_secondary_buffer;
|
|
uart0_cb.rx_secondary_buffer_length = 0;
|
|
uart0_cb.rx_counter = 0;
|
|
uart0_cb.rx_offset = 0;
|
|
|
|
event.type = UART_RX_BUF_REQUEST;
|
|
user_callback(dev, &event);
|
|
} else {
|
|
uart_nrfx_rx_disable(dev);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void tx_isr(const struct device *dev)
|
|
{
|
|
uart0_cb.tx_counter++;
|
|
if (uart0_cb.tx_counter < uart0_cb.tx_buffer_length &&
|
|
!uart0_cb.tx_abort) {
|
|
#if HW_FLOW_CONTROL_AVAILABLE
|
|
if (uart0_cb.tx_timeout != SYS_FOREVER_US) {
|
|
k_timer_start(&uart0_cb.tx_timeout_timer,
|
|
K_USEC(uart0_cb.tx_timeout),
|
|
K_NO_WAIT);
|
|
}
|
|
#endif
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_TXDRDY);
|
|
|
|
uint8_t txd = uart0_cb.tx_buffer[uart0_cb.tx_counter];
|
|
|
|
nrf_uart_txd_set(uart0_addr, txd);
|
|
} else {
|
|
#if HW_FLOW_CONTROL_AVAILABLE
|
|
|
|
if (uart0_cb.tx_timeout != SYS_FOREVER_US) {
|
|
k_timer_stop(&uart0_cb.tx_timeout_timer);
|
|
}
|
|
#endif
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPTX);
|
|
struct uart_event event = {
|
|
.type = UART_TX_DONE,
|
|
.data.tx.buf = uart0_cb.tx_buffer,
|
|
.data.tx.len = uart0_cb.tx_counter
|
|
};
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_TXDRDY);
|
|
uart0_cb.tx_buffer_length = 0;
|
|
uart0_cb.tx_counter = 0;
|
|
uart0_cb.tx_buffer = NULL;
|
|
|
|
nrf_uart_int_disable(uart0_addr, NRF_UART_INT_MASK_TXDRDY);
|
|
user_callback(dev, &event);
|
|
}
|
|
}
|
|
|
|
#define UART_ERROR_FROM_MASK(mask) \
|
|
(mask & NRF_UART_ERROR_OVERRUN_MASK ? UART_ERROR_OVERRUN \
|
|
: mask & NRF_UART_ERROR_PARITY_MASK ? UART_ERROR_PARITY \
|
|
: mask & NRF_UART_ERROR_FRAMING_MASK ? UART_ERROR_FRAMING \
|
|
: mask & NRF_UART_ERROR_BREAK_MASK ? UART_BREAK \
|
|
: 0)
|
|
|
|
static void error_isr(const struct device *dev)
|
|
{
|
|
if (uart0_cb.rx_timeout != SYS_FOREVER_US) {
|
|
k_timer_stop(&uart0_cb.rx_timeout_timer);
|
|
}
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_ERROR);
|
|
|
|
if (!uart0_cb.rx_enabled) {
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPRX);
|
|
}
|
|
struct uart_event event = {
|
|
.type = UART_RX_STOPPED,
|
|
.data.rx_stop.reason =
|
|
UART_ERROR_FROM_MASK(
|
|
nrf_uart_errorsrc_get_and_clear(uart0_addr)),
|
|
.data.rx_stop.data.len = uart0_cb.rx_counter
|
|
- uart0_cb.rx_offset,
|
|
.data.rx_stop.data.offset = uart0_cb.rx_offset,
|
|
.data.rx_stop.data.buf = uart0_cb.rx_buffer
|
|
};
|
|
|
|
user_callback(dev, &event);
|
|
/* Abort transfer. */
|
|
uart_nrfx_rx_disable(dev);
|
|
}
|
|
|
|
/*
|
|
* In nRF hardware RX timeout can occur only after stopping the peripheral,
|
|
* it is used as a sign that peripheral has finished its operation and is
|
|
* disabled.
|
|
*/
|
|
static void rxto_isr(const struct device *dev)
|
|
{
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXTO);
|
|
|
|
/* Send rxrdy if there is any data pending. */
|
|
if (uart0_cb.rx_counter - uart0_cb.rx_offset) {
|
|
rx_rdy_evt(dev);
|
|
}
|
|
|
|
buf_released_evt(dev);
|
|
if (uart0_cb.rx_secondary_buffer_length) {
|
|
uart0_cb.rx_buffer = uart0_cb.rx_secondary_buffer;
|
|
buf_released_evt(dev);
|
|
}
|
|
|
|
rx_reset_state();
|
|
rx_disabled_evt(dev);
|
|
}
|
|
|
|
void uart_nrfx_isr(const struct device *uart)
|
|
{
|
|
if (nrf_uart_int_enable_check(uart0_addr, NRF_UART_INT_MASK_ERROR) &&
|
|
nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_ERROR)) {
|
|
error_isr(uart);
|
|
} else if (nrf_uart_int_enable_check(uart0_addr,
|
|
NRF_UART_INT_MASK_RXDRDY) &&
|
|
nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXDRDY)) {
|
|
rx_isr(uart);
|
|
}
|
|
|
|
if (nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_TXDRDY)
|
|
&& nrf_uart_int_enable_check(uart0_addr,
|
|
NRF_UART_INT_MASK_TXDRDY)) {
|
|
tx_isr(uart);
|
|
}
|
|
|
|
if (nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXTO)) {
|
|
rxto_isr(uart);
|
|
}
|
|
}
|
|
|
|
static void rx_timeout(struct k_timer *timer)
|
|
{
|
|
rx_rdy_evt(DEVICE_DT_INST_GET(0));
|
|
}
|
|
|
|
#if HW_FLOW_CONTROL_AVAILABLE
|
|
static void tx_timeout(struct k_timer *timer)
|
|
{
|
|
struct uart_event evt;
|
|
|
|
if (uart0_cb.tx_timeout != SYS_FOREVER_US) {
|
|
k_timer_stop(&uart0_cb.tx_timeout_timer);
|
|
}
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPTX);
|
|
evt.type = UART_TX_ABORTED;
|
|
evt.data.tx.buf = uart0_cb.tx_buffer;
|
|
evt.data.tx.len = uart0_cb.tx_buffer_length;
|
|
uart0_cb.tx_buffer_length = 0;
|
|
uart0_cb.tx_counter = 0;
|
|
user_callback(DEVICE_DT_INST_GET(0), &evt);
|
|
}
|
|
#endif
|
|
|
|
#endif /* CONFIG_UART_0_ASYNC */
|
|
|
|
|
|
#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
|
|
|
|
/** Interrupt driven FIFO fill function */
|
|
static int uart_nrfx_fifo_fill(const struct device *dev,
|
|
const uint8_t *tx_data,
|
|
int len)
|
|
{
|
|
uint8_t num_tx = 0U;
|
|
|
|
while ((len - num_tx > 0) &&
|
|
event_txdrdy_check()) {
|
|
|
|
/* Clear the interrupt */
|
|
event_txdrdy_clear();
|
|
|
|
/* Send a character */
|
|
nrf_uart_txd_set(uart0_addr, (uint8_t)tx_data[num_tx++]);
|
|
}
|
|
|
|
return (int)num_tx;
|
|
}
|
|
|
|
/** Interrupt driven FIFO read function */
|
|
static int uart_nrfx_fifo_read(const struct device *dev,
|
|
uint8_t *rx_data,
|
|
const int size)
|
|
{
|
|
uint8_t num_rx = 0U;
|
|
|
|
while ((size - num_rx > 0) &&
|
|
nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXDRDY)) {
|
|
/* Clear the interrupt */
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXDRDY);
|
|
|
|
/* Receive a character */
|
|
rx_data[num_rx++] = (uint8_t)nrf_uart_rxd_get(uart0_addr);
|
|
}
|
|
|
|
return num_rx;
|
|
}
|
|
|
|
/** Interrupt driven transfer enabling function */
|
|
static void uart_nrfx_irq_tx_enable(const struct device *dev)
|
|
{
|
|
uint32_t key;
|
|
|
|
disable_tx_irq = false;
|
|
|
|
/* Indicate that this device started a transaction that should not be
|
|
* interrupted by putting the SoC into the deep sleep mode.
|
|
*/
|
|
pm_device_busy_set(dev);
|
|
|
|
/* Activate the transmitter. */
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTTX);
|
|
|
|
nrf_uart_int_enable(uart0_addr, NRF_UART_INT_MASK_TXDRDY);
|
|
|
|
/* Critical section is used to avoid any UART related interrupt which
|
|
* can occur after the if statement and before call of the function
|
|
* forcing an interrupt.
|
|
*/
|
|
key = irq_lock();
|
|
if (uart_sw_event_txdrdy) {
|
|
/* Due to HW limitation first TXDRDY interrupt shall be
|
|
* triggered by the software.
|
|
*/
|
|
NVIC_SetPendingIRQ(IRQN);
|
|
}
|
|
irq_unlock(key);
|
|
}
|
|
|
|
/** Interrupt driven transfer disabling function */
|
|
static void uart_nrfx_irq_tx_disable(const struct device *dev)
|
|
{
|
|
/* Disable TX interrupt in uart_nrfx_isr() when transmission is done. */
|
|
disable_tx_irq = true;
|
|
}
|
|
|
|
/** Interrupt driven receiver enabling function */
|
|
static void uart_nrfx_irq_rx_enable(const struct device *dev)
|
|
{
|
|
nrf_uart_int_enable(uart0_addr, NRF_UART_INT_MASK_RXDRDY);
|
|
}
|
|
|
|
/** Interrupt driven receiver disabling function */
|
|
static void uart_nrfx_irq_rx_disable(const struct device *dev)
|
|
{
|
|
nrf_uart_int_disable(uart0_addr, NRF_UART_INT_MASK_RXDRDY);
|
|
}
|
|
|
|
/** Interrupt driven transfer empty function */
|
|
static int uart_nrfx_irq_tx_ready_complete(const struct device *dev)
|
|
{
|
|
/* Signal TX readiness only when the TX interrupt is enabled and there
|
|
* is no pending request to disable it. Note that this function may get
|
|
* called after the TX interrupt is requested to be disabled but before
|
|
* the disabling is actually performed (in the IRQ handler).
|
|
*/
|
|
bool ready = nrf_uart_int_enable_check(uart0_addr,
|
|
NRF_UART_INT_MASK_TXDRDY) &&
|
|
!disable_tx_irq &&
|
|
event_txdrdy_check();
|
|
return ready ? 1 : 0;
|
|
}
|
|
|
|
/** Interrupt driven receiver ready function */
|
|
static int uart_nrfx_irq_rx_ready(const struct device *dev)
|
|
{
|
|
return nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXDRDY);
|
|
}
|
|
|
|
/** Interrupt driven error enabling function */
|
|
static void uart_nrfx_irq_err_enable(const struct device *dev)
|
|
{
|
|
nrf_uart_int_enable(uart0_addr, NRF_UART_INT_MASK_ERROR);
|
|
}
|
|
|
|
/** Interrupt driven error disabling function */
|
|
static void uart_nrfx_irq_err_disable(const struct device *dev)
|
|
{
|
|
nrf_uart_int_disable(uart0_addr, NRF_UART_INT_MASK_ERROR);
|
|
}
|
|
|
|
/** Interrupt driven pending status function */
|
|
static int uart_nrfx_irq_is_pending(const struct device *dev)
|
|
{
|
|
return ((nrf_uart_int_enable_check(uart0_addr,
|
|
NRF_UART_INT_MASK_TXDRDY) &&
|
|
uart_nrfx_irq_tx_ready_complete(dev))
|
|
||
|
|
(nrf_uart_int_enable_check(uart0_addr,
|
|
NRF_UART_INT_MASK_RXDRDY) &&
|
|
uart_nrfx_irq_rx_ready(dev)));
|
|
}
|
|
|
|
/** Interrupt driven interrupt update function */
|
|
static int uart_nrfx_irq_update(const struct device *dev)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
/** Set the callback function */
|
|
static void uart_nrfx_irq_callback_set(const struct device *dev,
|
|
uart_irq_callback_user_data_t cb,
|
|
void *cb_data)
|
|
{
|
|
(void)dev;
|
|
irq_callback = cb;
|
|
irq_cb_data = cb_data;
|
|
|
|
#if defined(CONFIG_UART_0_ASYNC) && defined(CONFIG_UART_EXCLUSIVE_API_CALLBACKS)
|
|
uart0_cb.callback = NULL;
|
|
uart0_cb.user_data = NULL;
|
|
#endif
|
|
}
|
|
|
|
/**
|
|
* @brief Interrupt service routine.
|
|
*
|
|
* This simply calls the callback function, if one exists.
|
|
*
|
|
* @param arg Argument to ISR.
|
|
*/
|
|
static void uart_nrfx_isr(const struct device *dev)
|
|
{
|
|
if (disable_tx_irq &&
|
|
nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_TXDRDY)) {
|
|
nrf_uart_int_disable(uart0_addr, NRF_UART_INT_MASK_TXDRDY);
|
|
|
|
/* Deactivate the transmitter so that it does not needlessly
|
|
* consume power.
|
|
*/
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STOPTX);
|
|
|
|
/* The transaction is over. It is okay to enter the deep sleep
|
|
* mode if needed.
|
|
*/
|
|
pm_device_busy_clear(dev);
|
|
|
|
disable_tx_irq = false;
|
|
|
|
return;
|
|
}
|
|
|
|
if (nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_ERROR)) {
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_ERROR);
|
|
}
|
|
|
|
if (irq_callback) {
|
|
irq_callback(dev, irq_cb_data);
|
|
}
|
|
}
|
|
#endif /* CONFIG_UART_0_INTERRUPT_DRIVEN */
|
|
|
|
/**
|
|
* @brief Initialize UART channel
|
|
*
|
|
* This routine is called to reset the chip in a quiescent state.
|
|
* It is assumed that this function is called only once per UART.
|
|
*
|
|
* @param dev UART device struct
|
|
*
|
|
* @return 0 on success
|
|
*/
|
|
static int uart_nrfx_init(const struct device *dev)
|
|
{
|
|
const struct uart_nrfx_config *config = dev->config;
|
|
struct uart_nrfx_data *data = dev->data;
|
|
int err;
|
|
|
|
nrf_uart_disable(uart0_addr);
|
|
|
|
err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
|
|
if (err < 0) {
|
|
return err;
|
|
}
|
|
|
|
/* Set initial configuration */
|
|
err = uart_nrfx_configure(dev, &data->uart_config);
|
|
if (err) {
|
|
return err;
|
|
}
|
|
|
|
/* Enable the UART and activate its receiver. With the current API
|
|
* the receiver needs to be active all the time. The transmitter
|
|
* will be activated when there is something to send.
|
|
*/
|
|
nrf_uart_enable(uart0_addr);
|
|
|
|
if (!DISABLE_RX) {
|
|
nrf_uart_event_clear(uart0_addr, NRF_UART_EVENT_RXDRDY);
|
|
|
|
nrf_uart_task_trigger(uart0_addr, NRF_UART_TASK_STARTRX);
|
|
}
|
|
|
|
#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
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/* Simulate that the TXDRDY event is set, so that the transmitter status
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* is indicated correctly.
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*/
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uart_sw_event_txdrdy = 1U;
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#endif
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#if defined(CONFIG_UART_0_ASYNC) || defined(CONFIG_UART_0_INTERRUPT_DRIVEN)
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IRQ_CONNECT(IRQN,
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IRQ_PRIO,
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uart_nrfx_isr,
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DEVICE_DT_INST_GET(0),
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0);
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irq_enable(IRQN);
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#endif
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|
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#ifdef CONFIG_UART_0_ASYNC
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k_timer_init(&uart0_cb.rx_timeout_timer, rx_timeout, NULL);
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#if HW_FLOW_CONTROL_AVAILABLE
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k_timer_init(&uart0_cb.tx_timeout_timer, tx_timeout, NULL);
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#endif
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#endif
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return 0;
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}
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|
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/* Common function: uart_nrfx_irq_tx_ready_complete is used for two API entries
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* because Nordic hardware does not distinguish between them.
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*/
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static const struct uart_driver_api uart_nrfx_uart_driver_api = {
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#ifdef CONFIG_UART_0_ASYNC
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.callback_set = uart_nrfx_callback_set,
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.tx = uart_nrfx_tx,
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.tx_abort = uart_nrfx_tx_abort,
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.rx_enable = uart_nrfx_rx_enable,
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.rx_buf_rsp = uart_nrfx_rx_buf_rsp,
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.rx_disable = uart_nrfx_rx_disable,
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#endif /* CONFIG_UART_0_ASYNC */
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.poll_in = uart_nrfx_poll_in,
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.poll_out = uart_nrfx_poll_out,
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|
.err_check = uart_nrfx_err_check,
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|
#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
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|
.configure = uart_nrfx_configure,
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|
.config_get = uart_nrfx_config_get,
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|
#endif
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|
#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN
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|
.fifo_fill = uart_nrfx_fifo_fill,
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|
.fifo_read = uart_nrfx_fifo_read,
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|
.irq_tx_enable = uart_nrfx_irq_tx_enable,
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|
.irq_tx_disable = uart_nrfx_irq_tx_disable,
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|
.irq_tx_ready = uart_nrfx_irq_tx_ready_complete,
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|
.irq_rx_enable = uart_nrfx_irq_rx_enable,
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|
.irq_rx_disable = uart_nrfx_irq_rx_disable,
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|
.irq_tx_complete = uart_nrfx_irq_tx_ready_complete,
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|
.irq_rx_ready = uart_nrfx_irq_rx_ready,
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|
.irq_err_enable = uart_nrfx_irq_err_enable,
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|
.irq_err_disable = uart_nrfx_irq_err_disable,
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|
.irq_is_pending = uart_nrfx_irq_is_pending,
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|
.irq_update = uart_nrfx_irq_update,
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|
.irq_callback_set = uart_nrfx_irq_callback_set,
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|
#endif /* CONFIG_UART_0_INTERRUPT_DRIVEN */
|
|
};
|
|
|
|
#ifdef CONFIG_PM_DEVICE
|
|
static int uart_nrfx_pm_action(const struct device *dev,
|
|
enum pm_device_action action)
|
|
{
|
|
const struct uart_nrfx_config *config = dev->config;
|
|
int ret;
|
|
|
|
switch (action) {
|
|
case PM_DEVICE_ACTION_RESUME:
|
|
ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
|
|
nrf_uart_enable(uart0_addr);
|
|
if (!DISABLE_RX) {
|
|
nrf_uart_task_trigger(uart0_addr,
|
|
NRF_UART_TASK_STARTRX);
|
|
}
|
|
break;
|
|
case PM_DEVICE_ACTION_SUSPEND:
|
|
nrf_uart_disable(uart0_addr);
|
|
ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
break;
|
|
default:
|
|
return -ENOTSUP;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PM_DEVICE */
|
|
|
|
PINCTRL_DT_INST_DEFINE(0);
|
|
|
|
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(0));
|
|
|
|
static const struct uart_nrfx_config uart_nrfx_uart0_config = {
|
|
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
|
|
};
|
|
|
|
static struct uart_nrfx_data uart_nrfx_uart0_data = {
|
|
.uart_config = {
|
|
.stop_bits = UART_CFG_STOP_BITS_1,
|
|
.data_bits = UART_CFG_DATA_BITS_8,
|
|
.baudrate = BAUDRATE,
|
|
#ifdef CONFIG_UART_0_NRF_PARITY_BIT
|
|
.parity = UART_CFG_PARITY_EVEN,
|
|
#else
|
|
.parity = UART_CFG_PARITY_NONE,
|
|
#endif /* CONFIG_UART_0_NRF_PARITY_BIT */
|
|
.flow_ctrl = PROP(hw_flow_control) ?
|
|
UART_CFG_FLOW_CTRL_RTS_CTS : UART_CFG_FLOW_CTRL_NONE,
|
|
}
|
|
};
|
|
|
|
PM_DEVICE_DT_INST_DEFINE(0, uart_nrfx_pm_action);
|
|
|
|
DEVICE_DT_INST_DEFINE(0,
|
|
uart_nrfx_init,
|
|
PM_DEVICE_DT_INST_GET(0),
|
|
&uart_nrfx_uart0_data,
|
|
&uart_nrfx_uart0_config,
|
|
/* Initialize UART device before UART console. */
|
|
PRE_KERNEL_1,
|
|
CONFIG_SERIAL_INIT_PRIORITY,
|
|
&uart_nrfx_uart_driver_api);
|