75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
/*
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* Copyright (c) 2022 Yonatan Schachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <zephyr/drivers/hwinfo.h>
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#include <hardware/flash.h>
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#include <hardware/structs/vreg_and_chip_reset.h>
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#define FLASH_RUID_DATA_BYTES 8
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#define HAD_RUN_BIT BIT(VREG_AND_CHIP_RESET_CHIP_RESET_HAD_RUN_LSB)
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#define HAD_PSM_RESTART_BIT BIT(VREG_AND_CHIP_RESET_CHIP_RESET_HAD_PSM_RESTART_LSB)
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#define HAD_POR_BIT BIT(VREG_AND_CHIP_RESET_CHIP_RESET_HAD_POR_LSB)
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ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
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{
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uint8_t id[FLASH_RUID_DATA_BYTES];
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uint32_t key;
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/*
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* flash_get_unique_id temporarily disables XIP to query the
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* flash for its ID. If the CPU is interrupted while XIP is
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* disabled, it will halt. Therefore, interrupts must be disabled
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* before fetching the ID.
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*/
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key = irq_lock();
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flash_get_unique_id(id);
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irq_unlock(key);
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if (length > sizeof(id)) {
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length = sizeof(id);
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}
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memcpy(buffer, id, length);
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return length;
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}
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int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
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{
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uint32_t flags = 0;
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uint32_t reset_register = vreg_and_chip_reset_hw->chip_reset;
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if (reset_register & HAD_POR_BIT) {
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flags |= RESET_POR;
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}
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if (reset_register & HAD_RUN_BIT) {
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flags |= RESET_PIN;
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}
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if (reset_register & HAD_PSM_RESTART_BIT) {
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flags |= RESET_DEBUG;
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}
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*cause = flags;
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return 0;
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}
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int z_impl_hwinfo_clear_reset_cause(void)
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{
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/* The reset register can't be modified, nothing to do. */
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return -ENOSYS;
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}
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int z_impl_hwinfo_get_supported_reset_cause(uint32_t *supported)
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{
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*supported = RESET_PIN | RESET_DEBUG | RESET_POR;
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return 0;
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}
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