443 lines
12 KiB
C
443 lines
12 KiB
C
/*
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* Copyright (c) 2022, Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_smartbond_gpio
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <stdint.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/irq.h>
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#include <zephyr/pm/device.h>
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#include <DA1469xAB.h>
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#include <da1469x_pdc.h>
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#include <da1469x_pd.h>
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#define GPIO_PUPD_INPUT 0
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#define GPIO_PUPD_INPUT_PU 1
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#define GPIO_PUPD_INPUT_PD 2
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#define GPIO_PUPD_OUTPUT 3
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/* GPIO P0 and P1 share single GPIO and WKUP peripheral instance with separate
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* set registers for P0 and P1 interleaved. The starting registers for direct
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* data access, bit access, mode, latch and wake-up controller are defined in
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* device tree.
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*/
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struct gpio_smartbond_data_regs {
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uint32_t data;
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uint32_t _reserved0;
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uint32_t set;
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uint32_t _reserved1;
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uint32_t reset;
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};
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struct gpio_smartbond_latch_regs {
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uint32_t latch;
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uint32_t set;
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uint32_t reset;
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};
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struct gpio_smartbond_wkup_regs {
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uint32_t select;
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uint32_t _reserved0[4];
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uint32_t pol;
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uint32_t _reserved1[4];
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uint32_t status;
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uint32_t _reserved2[2];
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uint32_t clear;
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uint32_t _reserved3[2];
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uint32_t sel;
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};
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struct gpio_smartbond_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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/* Pins that are configured for both edges (handled by software) */
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gpio_port_pins_t both_edges_pins;
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sys_slist_t callbacks;
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#if CONFIG_PM_DEVICE
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/*
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* Saved state consist of:
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* 1 word for GPIO output port state
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* GPIOx_NGPIOS words for each pin mode
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*/
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uint32_t *gpio_saved_state;
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#endif
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};
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struct gpio_smartbond_config {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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volatile struct gpio_smartbond_data_regs *data_regs;
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volatile uint32_t *mode_regs;
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volatile struct gpio_smartbond_latch_regs *latch_regs;
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volatile struct gpio_smartbond_wkup_regs *wkup_regs;
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/* Value of TRIG_SELECT for PDC_CTRLx_REG entry */
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uint8_t wkup_trig_select;
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#if CONFIG_PM_DEVICE
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uint8_t ngpios;
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#endif
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};
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static void gpio_smartbond_wkup_init(void)
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{
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static bool wkup_init;
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/* Wakeup controller is shared for both GPIO ports and should
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* be initialized only once.
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*/
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if (!wkup_init) {
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WAKEUP->WKUP_CTRL_REG = 0;
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WAKEUP->WKUP_CLEAR_P0_REG = 0xffffffff;
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WAKEUP->WKUP_CLEAR_P1_REG = 0xffffffff;
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WAKEUP->WKUP_SELECT_P0_REG = 0;
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WAKEUP->WKUP_SELECT_P1_REG = 0;
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WAKEUP->WKUP_SEL_GPIO_P0_REG = 0;
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WAKEUP->WKUP_SEL_GPIO_P1_REG = 0;
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WAKEUP->WKUP_RESET_IRQ_REG = 0;
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CRG_TOP->CLK_TMR_REG |= CRG_TOP_CLK_TMR_REG_WAKEUPCT_ENABLE_Msk;
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WAKEUP->WKUP_CTRL_REG = WAKEUP_WKUP_CTRL_REG_WKUP_ENABLE_IRQ_Msk;
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wkup_init = true;
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}
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}
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static int gpio_smartbond_pin_configure(const struct device *dev,
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gpio_pin_t pin, gpio_flags_t flags)
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{
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const struct gpio_smartbond_config *config = dev->config;
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if (flags == GPIO_DISCONNECTED) {
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/* Set pin as input with no resistors selected */
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config->mode_regs[pin] = GPIO_PUPD_INPUT << GPIO_P0_00_MODE_REG_PUPD_Pos;
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return 0;
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}
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if ((flags & GPIO_INPUT) && (flags & GPIO_OUTPUT)) {
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/* Simultaneous in/out is not supported */
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return -ENOTSUP;
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}
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if (flags & GPIO_OUTPUT) {
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config->mode_regs[pin] = GPIO_PUPD_OUTPUT << GPIO_P0_00_MODE_REG_PUPD_Pos;
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if (flags & GPIO_OUTPUT_INIT_LOW) {
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config->data_regs->reset = BIT(pin);
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} else if (flags & GPIO_OUTPUT_INIT_HIGH) {
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config->data_regs->set = BIT(pin);
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}
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return 0;
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}
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if (flags & GPIO_PULL_DOWN) {
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config->mode_regs[pin] = GPIO_PUPD_INPUT_PD << GPIO_P0_00_MODE_REG_PUPD_Pos;
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} else if (flags & GPIO_PULL_UP) {
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config->mode_regs[pin] = GPIO_PUPD_INPUT_PU << GPIO_P0_00_MODE_REG_PUPD_Pos;
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} else {
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config->mode_regs[pin] = GPIO_PUPD_INPUT << GPIO_P0_00_MODE_REG_PUPD_Pos;
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}
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return 0;
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}
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static int gpio_smartbond_port_get_raw(const struct device *dev,
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gpio_port_value_t *value)
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{
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const struct gpio_smartbond_config *config = dev->config;
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*value = config->data_regs->data;
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return 0;
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}
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static int gpio_smartbond_port_set_masked_raw(const struct device *dev,
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gpio_port_pins_t mask,
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gpio_port_value_t value)
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{
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const struct gpio_smartbond_config *config = dev->config;
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config->data_regs->set = value & mask;
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config->data_regs->reset = ~value & mask;
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return 0;
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}
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static int gpio_smartbond_port_set_bits_raw(const struct device *dev,
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gpio_port_pins_t pins)
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{
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const struct gpio_smartbond_config *config = dev->config;
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config->data_regs->set = pins;
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return 0;
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}
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static int gpio_smartbond_port_clear_bits_raw(const struct device *dev,
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gpio_port_pins_t pins)
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{
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const struct gpio_smartbond_config *config = dev->config;
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config->data_regs->reset = pins;
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return 0;
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}
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static int gpio_smartbond_port_toggle_bits(const struct device *dev,
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gpio_port_pins_t mask)
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{
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const struct gpio_smartbond_config *config = dev->config;
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volatile uint32_t *reg = &config->data_regs->data;
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*reg = *reg ^ mask;
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return 0;
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}
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static void gpio_smartbond_arm_next_edge_interrupt(const struct device *dev,
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uint32_t pin_mask)
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{
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const struct gpio_smartbond_config *config = dev->config;
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uint32_t pin_value;
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do {
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pin_value = config->data_regs->data & pin_mask;
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if (pin_value) {
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config->wkup_regs->pol |= pin_mask;
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} else {
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config->wkup_regs->pol &= ~pin_mask;
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}
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} while (pin_value != (config->data_regs->data & pin_mask));
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}
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static int gpio_smartbond_pin_interrupt_configure(const struct device *dev,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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const struct gpio_smartbond_config *config = dev->config;
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struct gpio_smartbond_data *data = dev->data;
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uint32_t pin_mask = BIT(pin);
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#if CONFIG_PM
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int trig_select_id = (config->wkup_trig_select << 5) | pin;
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int pdc_ix;
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#endif
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/* Not supported by hardware */
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if (mode == GPIO_INT_MODE_LEVEL) {
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return -ENOTSUP;
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}
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#if CONFIG_PM
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pdc_ix = da1469x_pdc_find(trig_select_id, MCU_PDC_MASTER_M33, MCU_PDC_EN_XTAL);
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#endif
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if (mode == GPIO_INT_MODE_DISABLED) {
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config->wkup_regs->sel &= ~pin_mask;
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config->wkup_regs->clear = pin_mask;
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data->both_edges_pins &= ~pin_mask;
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#if CONFIG_PM
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if (pdc_ix >= 0) {
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da1469x_pdc_del(pdc_ix);
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}
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#endif
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} else {
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if (trig == GPIO_INT_TRIG_BOTH) {
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/* Not supported by hardware */
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data->both_edges_pins |= pin_mask;
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gpio_smartbond_arm_next_edge_interrupt(dev, pin_mask);
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} else if (trig == GPIO_INT_TRIG_HIGH) {
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config->wkup_regs->pol &= ~pin_mask;
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} else {
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config->wkup_regs->pol |= pin_mask;
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}
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config->wkup_regs->sel |= pin_mask;
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#if CONFIG_PM
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if (pdc_ix < 0) {
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pdc_ix = da1469x_pdc_add(trig_select_id, MCU_PDC_MASTER_M33,
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MCU_PDC_EN_XTAL);
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}
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if (pdc_ix < 0) {
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return -ENOMEM;
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}
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#endif
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}
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return 0;
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}
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static int gpio_smartbond_manage_callback(const struct device *dev,
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struct gpio_callback *callback, bool set)
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{
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struct gpio_smartbond_data *data = dev->data;
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return gpio_manage_callback(&data->callbacks, callback, set);
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}
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static void gpio_smartbond_isr(const struct device *dev)
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{
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const struct gpio_smartbond_config *config = dev->config;
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struct gpio_smartbond_data *data = dev->data;
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uint32_t stat;
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uint32_t two_edge_triggered;
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WAKEUP->WKUP_RESET_IRQ_REG = WAKEUP_WKUP_RESET_IRQ_REG_WKUP_IRQ_RST_Msk;
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stat = config->wkup_regs->status;
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two_edge_triggered = stat & data->both_edges_pins;
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while (two_edge_triggered) {
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int pos = find_lsb_set(two_edge_triggered) - 1;
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two_edge_triggered &= ~BIT(pos);
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/* Re-arm for other edge */
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gpio_smartbond_arm_next_edge_interrupt(dev, BIT(pos));
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}
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config->wkup_regs->clear = stat;
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gpio_fire_callbacks(&data->callbacks, dev, stat);
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}
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#ifdef CONFIG_PM_DEVICE
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static void gpio_latch_inst(mem_addr_t data_reg, mem_addr_t mode_reg, mem_addr_t latch_reg,
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uint8_t ngpios, uint32_t *data, uint32_t *mode)
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{
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uint8_t idx;
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*data = sys_read32(data_reg);
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for (idx = 0; idx < ngpios; idx++, mode_reg += 4) {
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mode[idx] = sys_read32(mode_reg);
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}
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sys_write32(BIT_MASK(ngpios), latch_reg);
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}
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static void gpio_unlatch_inst(mem_addr_t data_reg, mem_addr_t mode_reg, mem_addr_t latch_reg,
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uint8_t ngpios, uint32_t data, uint32_t *mode)
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{
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uint8_t idx;
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sys_write32(data, data_reg);
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for (idx = 0; idx < ngpios; idx++, mode_reg += 4) {
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sys_write32(mode[idx], mode_reg);
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}
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sys_write32(BIT_MASK(ngpios), latch_reg);
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}
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static void gpio_latch(const struct device *dev)
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{
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const struct gpio_smartbond_config *config = dev->config;
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const struct gpio_smartbond_data *data = dev->data;
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gpio_latch_inst((mem_addr_t)&config->data_regs->data,
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(mem_addr_t)config->mode_regs,
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(mem_addr_t)&config->latch_regs->reset,
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config->ngpios, data->gpio_saved_state, data->gpio_saved_state + 1);
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}
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static void gpio_unlatch(const struct device *dev)
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{
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const struct gpio_smartbond_config *config = dev->config;
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const struct gpio_smartbond_data *data = dev->data;
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gpio_unlatch_inst((mem_addr_t)&config->data_regs->data,
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(mem_addr_t)config->mode_regs,
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(mem_addr_t)&config->latch_regs->set,
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config->ngpios, data->gpio_saved_state[0], data->gpio_saved_state + 1);
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}
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static int gpio_smartbond_pm_action(const struct device *dev,
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enum pm_device_action action)
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{
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int ret = 0;
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switch (action) {
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case PM_DEVICE_ACTION_RESUME:
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da1469x_pd_acquire(MCU_PD_DOMAIN_COM);
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gpio_unlatch(dev);
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break;
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case PM_DEVICE_ACTION_SUSPEND:
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gpio_latch(dev);
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da1469x_pd_release(MCU_PD_DOMAIN_COM);
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break;
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default:
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ret = -ENOTSUP;
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}
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return ret;
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}
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#endif /* CONFIG_PM_DEVICE */
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/* GPIO driver registration */
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static const struct gpio_driver_api gpio_smartbond_drv_api_funcs = {
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.pin_configure = gpio_smartbond_pin_configure,
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.port_get_raw = gpio_smartbond_port_get_raw,
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.port_set_masked_raw = gpio_smartbond_port_set_masked_raw,
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.port_set_bits_raw = gpio_smartbond_port_set_bits_raw,
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.port_clear_bits_raw = gpio_smartbond_port_clear_bits_raw,
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.port_toggle_bits = gpio_smartbond_port_toggle_bits,
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.pin_interrupt_configure = gpio_smartbond_pin_interrupt_configure,
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.manage_callback = gpio_smartbond_manage_callback,
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};
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#define GPIO_SAVED_STATE(id) gpio_smartbond_saved_state_##id
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#define GPIO_PM_DEVICE_CFG(fld, val) \
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COND_CODE_1(CONFIG_PM_DEVICE, (fld = val,), ())
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#define GPIO_PM_DEVICE_STATE(id, ngpios) \
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COND_CODE_1(CONFIG_PM_DEVICE, (static uint32_t GPIO_SAVED_STATE(id)[1 + ngpios];), ())
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#define GPIO_SMARTBOND_DEVICE(id) \
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GPIO_PM_DEVICE_STATE(id, DT_INST_PROP(id, ngpios)) \
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static const struct gpio_smartbond_config gpio_smartbond_config_##id = { \
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.common = { \
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.port_pin_mask = \
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GPIO_PORT_PIN_MASK_FROM_DT_INST(id), \
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}, \
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.data_regs = (volatile struct gpio_smartbond_data_regs *) \
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DT_INST_REG_ADDR_BY_NAME(id, data), \
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.mode_regs = (volatile uint32_t *)DT_INST_REG_ADDR_BY_NAME(id, mode), \
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.latch_regs = (volatile struct gpio_smartbond_latch_regs *) \
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DT_INST_REG_ADDR_BY_NAME(id, latch), \
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.wkup_regs = (volatile struct gpio_smartbond_wkup_regs *) \
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DT_INST_REG_ADDR_BY_NAME(id, wkup), \
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.wkup_trig_select = id, \
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GPIO_PM_DEVICE_CFG(.ngpios, DT_INST_PROP(id, ngpios)) \
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}; \
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\
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static struct gpio_smartbond_data gpio_smartbond_data_##id = { \
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GPIO_PM_DEVICE_CFG(.gpio_saved_state, GPIO_SAVED_STATE(id)) \
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}; \
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\
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static int gpio_smartbond_init_##id(const struct device *dev) \
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{ \
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da1469x_pd_acquire(MCU_PD_DOMAIN_COM); \
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gpio_smartbond_wkup_init(); \
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IRQ_CONNECT(DT_INST_IRQN(id), \
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DT_INST_IRQ(id, priority), \
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gpio_smartbond_isr, \
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DEVICE_DT_INST_GET(id), 0); \
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irq_enable(DT_INST_IRQN(id)); \
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return 0; \
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} \
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\
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PM_DEVICE_DEFINE(id, gpio_smartbond_pm_action); \
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DEVICE_DT_INST_DEFINE(id, gpio_smartbond_init_##id, \
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PM_DEVICE_GET(id), \
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&gpio_smartbond_data_##id, \
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&gpio_smartbond_config_##id, \
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PRE_KERNEL_1, \
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CONFIG_GPIO_INIT_PRIORITY, \
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&gpio_smartbond_drv_api_funcs);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_SMARTBOND_DEVICE)
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