243 lines
6.9 KiB
C
243 lines
6.9 KiB
C
/*
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* Copyright (c) 2021, Yonatan Schachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/irq.h>
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/* pico-sdk includes */
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#include <hardware/gpio.h>
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#include <hardware/regs/intctrl.h>
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#include <hardware/structs/iobank0.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#define DT_DRV_COMPAT raspberrypi_pico_gpio
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#define ALL_EVENTS (GPIO_IRQ_EDGE_FALL | GPIO_IRQ_EDGE_RISE \
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| GPIO_IRQ_LEVEL_LOW | GPIO_IRQ_LEVEL_HIGH)
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struct gpio_rpi_config {
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struct gpio_driver_config common;
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void (*bank_config_func)(void);
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};
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struct gpio_rpi_data {
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struct gpio_driver_data common;
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sys_slist_t callbacks;
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uint32_t int_enabled_mask;
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uint32_t single_ended_mask;
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uint32_t open_drain_mask;
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};
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static int gpio_rpi_configure(const struct device *dev,
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gpio_pin_t pin,
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gpio_flags_t flags)
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{
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struct gpio_rpi_data *data = dev->data;
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gpio_set_pulls(pin,
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(flags & GPIO_PULL_UP) != 0U,
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(flags & GPIO_PULL_DOWN) != 0U);
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/* Avoid gpio_init, since that also clears previously set direction/high/low */
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gpio_set_function(pin, GPIO_FUNC_SIO);
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if (flags & GPIO_OUTPUT) {
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if (flags & GPIO_SINGLE_ENDED) {
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data->single_ended_mask |= BIT(pin);
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/* Setting the initial state of output data, and output enable.
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* The output data will not change from here on, only output
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* enable will. If none of the GPIO_OUTPUT_INIT_* flags have
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* been set then fall back to the non-agressive input mode.
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*/
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if (flags & GPIO_LINE_OPEN_DRAIN) {
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data->open_drain_mask |= BIT(pin);
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gpio_put(pin, 0);
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gpio_set_dir(pin, flags & GPIO_OUTPUT_INIT_LOW);
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} else {
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data->open_drain_mask &= ~(BIT(pin));
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gpio_put(pin, 1);
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gpio_set_dir(pin, flags & GPIO_OUTPUT_INIT_HIGH);
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}
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} else {
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data->single_ended_mask &= ~(BIT(pin));
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if (flags & GPIO_OUTPUT_INIT_HIGH) {
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gpio_put(pin, 1);
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} else if (flags & GPIO_OUTPUT_INIT_LOW) {
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gpio_put(pin, 0);
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}
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gpio_set_dir(pin, GPIO_OUT);
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}
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} else if (flags & GPIO_INPUT) {
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gpio_set_dir(pin, GPIO_IN);
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}
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return 0;
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}
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static int gpio_rpi_port_get_raw(const struct device *dev, uint32_t *value)
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{
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*value = gpio_get_all();
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return 0;
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}
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static int gpio_rpi_port_set_masked_raw(const struct device *port,
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uint32_t mask, uint32_t value)
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{
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struct gpio_rpi_data *data = port->data;
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/* First handle push-pull pins: */
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gpio_put_masked(mask & ~data->single_ended_mask, value);
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/* Then handle open-drain pins: */
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gpio_set_dir_masked(mask & data->single_ended_mask & data->open_drain_mask, ~value);
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/* Then handle open-source pins: */
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gpio_set_dir_masked(mask & data->single_ended_mask & ~data->open_drain_mask, value);
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return 0;
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}
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static int gpio_rpi_port_set_bits_raw(const struct device *port,
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uint32_t pins)
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{
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struct gpio_rpi_data *data = port->data;
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/* First handle push-pull pins: */
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gpio_set_mask(pins & ~data->single_ended_mask);
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/* Then handle open-drain pins: */
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gpio_set_dir_in_masked(pins & data->single_ended_mask & data->open_drain_mask);
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/* Then handle open-source pins: */
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gpio_set_dir_out_masked(pins & data->single_ended_mask & ~data->open_drain_mask);
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return 0;
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}
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static int gpio_rpi_port_clear_bits_raw(const struct device *port,
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uint32_t pins)
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{
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struct gpio_rpi_data *data = port->data;
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/* First handle push-pull pins: */
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gpio_clr_mask(pins & ~data->single_ended_mask);
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/* Then handle open-drain pins: */
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gpio_set_dir_out_masked(pins & data->single_ended_mask & data->open_drain_mask);
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/* Then handle open-source pins: */
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gpio_set_dir_in_masked(pins & data->single_ended_mask & ~data->open_drain_mask);
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return 0;
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}
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static int gpio_rpi_port_toggle_bits(const struct device *port,
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uint32_t pins)
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{
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struct gpio_rpi_data *data = port->data;
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/* First handle push-pull pins: */
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gpio_xor_mask(pins & ~data->single_ended_mask);
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/* Then handle single-ended pins: */
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/* (unfortunately there's no pico-sdk api call that can be used for this,
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* but it's possible by accessing the registers directly)
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*/
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sio_hw->gpio_oe_togl = (pins & data->single_ended_mask);
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return 0;
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}
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static int gpio_rpi_pin_interrupt_configure(const struct device *dev,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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struct gpio_rpi_data *data = dev->data;
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uint32_t events = 0;
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gpio_set_irq_enabled(pin, ALL_EVENTS, false);
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if (mode != GPIO_INT_DISABLE) {
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if (mode & GPIO_INT_EDGE) {
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if (trig & GPIO_INT_LOW_0) {
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events |= GPIO_IRQ_EDGE_FALL;
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}
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if (trig & GPIO_INT_HIGH_1) {
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events |= GPIO_IRQ_EDGE_RISE;
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}
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} else {
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if (trig & GPIO_INT_LOW_0) {
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events |= GPIO_IRQ_LEVEL_LOW;
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}
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if (trig & GPIO_INT_HIGH_1) {
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events |= GPIO_IRQ_LEVEL_HIGH;
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}
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}
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gpio_set_irq_enabled(pin, events, true);
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}
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WRITE_BIT(data->int_enabled_mask, pin, mode != GPIO_INT_DISABLE);
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return 0;
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}
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static int gpio_rpi_manage_callback(const struct device *dev,
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struct gpio_callback *callback, bool set)
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{
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struct gpio_rpi_data *data = dev->data;
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return gpio_manage_callback(&data->callbacks, callback, set);
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}
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static const struct gpio_driver_api gpio_rpi_driver_api = {
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.pin_configure = gpio_rpi_configure,
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.port_get_raw = gpio_rpi_port_get_raw,
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.port_set_masked_raw = gpio_rpi_port_set_masked_raw,
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.port_set_bits_raw = gpio_rpi_port_set_bits_raw,
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.port_clear_bits_raw = gpio_rpi_port_clear_bits_raw,
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.port_toggle_bits = gpio_rpi_port_toggle_bits,
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.pin_interrupt_configure = gpio_rpi_pin_interrupt_configure,
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.manage_callback = gpio_rpi_manage_callback,
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};
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static void gpio_rpi_isr(const struct device *dev)
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{
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struct gpio_rpi_data *data = dev->data;
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io_bank0_irq_ctrl_hw_t *irq_ctrl_base;
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const io_rw_32 *status_reg;
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uint32_t events;
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uint32_t pin;
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irq_ctrl_base = &iobank0_hw->proc0_irq_ctrl;
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for (pin = 0; pin < NUM_BANK0_GPIOS; pin++) {
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status_reg = &irq_ctrl_base->ints[pin / 8];
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events = (*status_reg >> 4 * (pin % 8)) & ALL_EVENTS;
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if (events) {
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gpio_acknowledge_irq(pin, ALL_EVENTS);
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gpio_fire_callbacks(&data->callbacks, dev, BIT(pin));
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}
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}
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}
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static int gpio_rpi_bank_init(const struct device *dev)
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{
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const struct gpio_rpi_config *config = dev->config;
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config->bank_config_func();
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return 0;
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}
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#define GPIO_RPI_INIT(idx) \
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static void bank_##idx##_config_func(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), \
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gpio_rpi_isr, DEVICE_DT_INST_GET(idx), 0); \
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irq_enable(DT_INST_IRQN(idx)); \
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} \
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static const struct gpio_rpi_config gpio_rpi_##idx##_config = { \
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.bank_config_func = bank_##idx##_config_func, \
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.common = \
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{ \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(idx), \
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} \
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}; \
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\
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static struct gpio_rpi_data gpio_rpi_##idx##_data; \
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\
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DEVICE_DT_INST_DEFINE(idx, gpio_rpi_bank_init, NULL, \
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&gpio_rpi_##idx##_data, \
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&gpio_rpi_##idx##_config, \
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POST_KERNEL, CONFIG_GPIO_INIT_PRIORITY, \
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&gpio_rpi_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_RPI_INIT)
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