477 lines
12 KiB
C
477 lines
12 KiB
C
/*
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* Copyright (c) 2021, Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nordic_nrf_gpio
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#include <nrfx_gpiote.h>
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#include <string.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
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#include <zephyr/irq.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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struct gpio_nrfx_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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sys_slist_t callbacks;
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};
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struct gpio_nrfx_cfg {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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NRF_GPIO_Type *port;
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uint32_t edge_sense;
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uint8_t port_num;
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nrfx_gpiote_t gpiote;
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};
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static inline struct gpio_nrfx_data *get_port_data(const struct device *port)
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{
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return port->data;
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}
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static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port)
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{
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return port->config;
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}
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static bool has_gpiote(const struct gpio_nrfx_cfg *cfg)
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{
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return cfg->gpiote.p_reg != NULL;
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}
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static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags)
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{
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if (flags & GPIO_PULL_UP) {
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return NRF_GPIO_PIN_PULLUP;
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} else if (flags & GPIO_PULL_DOWN) {
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return NRF_GPIO_PIN_PULLDOWN;
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}
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return NRF_GPIO_PIN_NOPULL;
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}
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static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
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gpio_flags_t flags)
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{
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nrfx_err_t err = NRFX_SUCCESS;
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uint8_t ch;
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bool free_ch = false;
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const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
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nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
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nrf_gpio_pin_pull_t pull = get_pull(flags);
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nrf_gpio_pin_drive_t drive;
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switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
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case NRF_GPIO_DRIVE_S0S1:
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drive = NRF_GPIO_PIN_S0S1;
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break;
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case NRF_GPIO_DRIVE_S0H1:
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drive = NRF_GPIO_PIN_S0H1;
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break;
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case NRF_GPIO_DRIVE_H0S1:
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drive = NRF_GPIO_PIN_H0S1;
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break;
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case NRF_GPIO_DRIVE_H0H1:
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drive = NRF_GPIO_PIN_H0H1;
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break;
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case NRF_GPIO_DRIVE_S0 | GPIO_OPEN_DRAIN:
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drive = NRF_GPIO_PIN_S0D1;
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break;
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case NRF_GPIO_DRIVE_H0 | GPIO_OPEN_DRAIN:
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drive = NRF_GPIO_PIN_H0D1;
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break;
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case NRF_GPIO_DRIVE_S1 | GPIO_OPEN_SOURCE:
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drive = NRF_GPIO_PIN_D0S1;
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break;
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case NRF_GPIO_DRIVE_H1 | GPIO_OPEN_SOURCE:
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drive = NRF_GPIO_PIN_D0H1;
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break;
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default:
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return -EINVAL;
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}
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if (flags & GPIO_OUTPUT_INIT_HIGH) {
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nrf_gpio_port_out_set(cfg->port, BIT(pin));
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} else if (flags & GPIO_OUTPUT_INIT_LOW) {
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nrf_gpio_port_out_clear(cfg->port, BIT(pin));
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}
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if (!has_gpiote(cfg)) {
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nrf_gpio_pin_dir_t dir = (flags & GPIO_OUTPUT)
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? NRF_GPIO_PIN_DIR_OUTPUT
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: NRF_GPIO_PIN_DIR_INPUT;
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nrf_gpio_pin_input_t input = (flags & GPIO_INPUT)
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? NRF_GPIO_PIN_INPUT_CONNECT
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: NRF_GPIO_PIN_INPUT_DISCONNECT;
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nrf_gpio_reconfigure(abs_pin, &dir, &input, &pull, &drive, NULL);
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return 0;
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}
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/* Get the GPIOTE channel associated with this pin, if any. It needs
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* to be freed when the pin is reconfigured or disconnected.
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*/
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if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
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err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
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free_ch = (err == NRFX_SUCCESS);
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}
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if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
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/* Ignore the error code. The pin may not have been used. */
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(void)nrfx_gpiote_pin_uninit(&cfg->gpiote, abs_pin);
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} else {
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/* Remove previously configured trigger when pin is reconfigured. */
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if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
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nrfx_gpiote_trigger_config_t trigger_config = {
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.trigger = NRFX_GPIOTE_TRIGGER_NONE,
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};
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nrfx_gpiote_input_pin_config_t input_pin_config = {
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.p_trigger_config = &trigger_config,
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};
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err = nrfx_gpiote_input_configure(&cfg->gpiote,
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abs_pin, &input_pin_config);
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if (err != NRFX_SUCCESS) {
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return -EINVAL;
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}
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}
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if (flags & GPIO_OUTPUT) {
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nrfx_gpiote_output_config_t output_config = {
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.drive = drive,
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.input_connect = (flags & GPIO_INPUT)
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? NRF_GPIO_PIN_INPUT_CONNECT
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: NRF_GPIO_PIN_INPUT_DISCONNECT,
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.pull = pull,
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};
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err = nrfx_gpiote_output_configure(&cfg->gpiote,
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abs_pin, &output_config, NULL);
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} else {
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nrfx_gpiote_input_pin_config_t input_pin_config = {
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.p_pull_config = &pull,
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};
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err = nrfx_gpiote_input_configure(&cfg->gpiote,
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abs_pin, &input_pin_config);
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}
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if (err != NRFX_SUCCESS) {
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return -EINVAL;
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}
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}
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if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT) && free_ch) {
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err = nrfx_gpiote_channel_free(&cfg->gpiote, ch);
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__ASSERT_NO_MSG(err == NRFX_SUCCESS);
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}
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return 0;
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}
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static int gpio_nrfx_port_get_raw(const struct device *port,
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gpio_port_value_t *value)
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{
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NRF_GPIO_Type *reg = get_port_cfg(port)->port;
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*value = nrf_gpio_port_in_read(reg);
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return 0;
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}
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static int gpio_nrfx_port_set_masked_raw(const struct device *port,
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gpio_port_pins_t mask,
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gpio_port_value_t value)
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{
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NRF_GPIO_Type *reg = get_port_cfg(port)->port;
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const uint32_t set_mask = value & mask;
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const uint32_t clear_mask = (~set_mask) & mask;
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nrf_gpio_port_out_set(reg, set_mask);
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nrf_gpio_port_out_clear(reg, clear_mask);
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return 0;
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}
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static int gpio_nrfx_port_set_bits_raw(const struct device *port,
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gpio_port_pins_t mask)
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{
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NRF_GPIO_Type *reg = get_port_cfg(port)->port;
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nrf_gpio_port_out_set(reg, mask);
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return 0;
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}
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static int gpio_nrfx_port_clear_bits_raw(const struct device *port,
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gpio_port_pins_t mask)
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{
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NRF_GPIO_Type *reg = get_port_cfg(port)->port;
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nrf_gpio_port_out_clear(reg, mask);
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return 0;
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}
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static int gpio_nrfx_port_toggle_bits(const struct device *port,
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gpio_port_pins_t mask)
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{
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NRF_GPIO_Type *reg = get_port_cfg(port)->port;
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const uint32_t value = nrf_gpio_port_out_read(reg) ^ mask;
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const uint32_t set_mask = value & mask;
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const uint32_t clear_mask = (~value) & mask;
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nrf_gpio_port_out_set(reg, set_mask);
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nrf_gpio_port_out_clear(reg, clear_mask);
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return 0;
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}
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#ifdef CONFIG_GPIO_NRFX_INTERRUPT
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static nrfx_gpiote_trigger_t get_trigger(enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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if (mode == GPIO_INT_MODE_LEVEL) {
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return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
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NRFX_GPIOTE_TRIGGER_HIGH;
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}
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return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
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trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_HITOLO :
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NRFX_GPIOTE_TRIGGER_LOTOHI;
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}
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static int gpio_nrfx_pin_interrupt_configure(const struct device *port,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
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uint32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
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nrfx_err_t err;
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uint8_t ch;
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if (!has_gpiote(cfg)) {
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return -ENOTSUP;
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}
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if (mode == GPIO_INT_MODE_DISABLED) {
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nrfx_gpiote_trigger_disable(&cfg->gpiote, abs_pin);
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return 0;
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}
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nrfx_gpiote_trigger_config_t trigger_config = {
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.trigger = get_trigger(mode, trig),
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};
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nrfx_gpiote_input_pin_config_t input_pin_config = {
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.p_trigger_config = &trigger_config,
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};
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/* If edge mode is to be used and pin is not configured to use sense for
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* edge use IN event.
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*/
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if (!(BIT(pin) & cfg->edge_sense) &&
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(mode == GPIO_INT_MODE_EDGE) &&
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(nrf_gpio_pin_dir_get(abs_pin) == NRF_GPIO_PIN_DIR_INPUT)) {
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err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
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if (err == NRFX_ERROR_INVALID_PARAM) {
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err = nrfx_gpiote_channel_alloc(&cfg->gpiote, &ch);
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if (err != NRFX_SUCCESS) {
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return -ENOMEM;
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}
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}
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trigger_config.p_in_channel = &ch;
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}
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err = nrfx_gpiote_input_configure(&cfg->gpiote, abs_pin, &input_pin_config);
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if (err != NRFX_SUCCESS) {
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return -EINVAL;
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}
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nrfx_gpiote_trigger_enable(&cfg->gpiote, abs_pin, true);
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return 0;
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}
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static int gpio_nrfx_manage_callback(const struct device *port,
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struct gpio_callback *callback,
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bool set)
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{
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return gpio_manage_callback(&get_port_data(port)->callbacks,
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callback, set);
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}
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#endif /* CONFIG_GPIO_NRFX_INTERRUPT */
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#ifdef CONFIG_GPIO_GET_DIRECTION
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static int gpio_nrfx_port_get_direction(const struct device *port,
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gpio_port_pins_t map,
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gpio_port_pins_t *inputs,
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gpio_port_pins_t *outputs)
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{
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const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
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NRF_GPIO_Type *reg = cfg->port;
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map &= cfg->common.port_pin_mask;
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if (outputs != NULL) {
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*outputs = map & nrf_gpio_port_dir_read(cfg->port);
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}
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if (inputs != NULL) {
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*inputs = 0;
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while (map) {
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uint32_t pin = NRF_CTZ(map);
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uint32_t pin_cnf = reg->PIN_CNF[pin];
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/* Check if the pin has its input buffer connected. */
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if (((pin_cnf & GPIO_PIN_CNF_INPUT_Msk) >>
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GPIO_PIN_CNF_INPUT_Pos) ==
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GPIO_PIN_CNF_INPUT_Connect) {
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*inputs |= BIT(pin);
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}
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map &= ~BIT(pin);
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}
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}
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return 0;
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}
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#endif /* CONFIG_GPIO_GET_DIRECTION */
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#ifdef CONFIG_GPIO_NRFX_INTERRUPT
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/* Get port device from port id. */
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static const struct device *get_dev(uint32_t port_id)
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{
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const struct device *dev = NULL;
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#define GPIO_NRF_GET_DEV(i) \
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else if (DT_INST_PROP(i, port) == port_id) { \
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dev = DEVICE_DT_INST_GET(i); \
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}
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if (0) {
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} /* Followed by else if from FOREACH macro. Done to avoid return statement in macro. */
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DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
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#undef GPIO_NRF_GET_DEV
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return dev;
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}
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static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
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nrfx_gpiote_trigger_t trigger,
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void *context)
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{
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uint32_t pin = abs_pin;
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uint32_t port_id = nrf_gpio_pin_port_number_extract(&pin);
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const struct device *port = get_dev(port_id);
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/* If given port is handled directly by nrfx driver it might not be enabled in DT. */
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if (port == NULL) {
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return;
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}
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struct gpio_nrfx_data *data = get_port_data(port);
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sys_slist_t *list = &data->callbacks;
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gpio_fire_callbacks(list, port, BIT(pin));
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}
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#endif /* CONFIG_GPIO_NRFX_INTERRUPT */
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#define GPIOTE_IRQ_HANDLER_CONNECT(node_id) \
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IRQ_CONNECT(DT_IRQN(node_id), DT_IRQ(node_id, priority), nrfx_isr, \
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NRFX_CONCAT(nrfx_gpiote_, DT_PROP(node_id, instance), _irq_handler), 0);
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static int gpio_nrfx_init(const struct device *port)
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{
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const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
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nrfx_err_t err;
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if (!has_gpiote(cfg)) {
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return 0;
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}
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if (nrfx_gpiote_init_check(&cfg->gpiote)) {
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return 0;
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}
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err = nrfx_gpiote_init(&cfg->gpiote, 0 /*not used*/);
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if (err != NRFX_SUCCESS) {
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return -EIO;
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}
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#ifdef CONFIG_GPIO_NRFX_INTERRUPT
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nrfx_gpiote_global_callback_set(&cfg->gpiote, nrfx_gpio_handler, NULL);
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DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_IRQ_HANDLER_CONNECT);
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#endif /* CONFIG_GPIO_NRFX_INTERRUPT */
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return 0;
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}
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static const struct gpio_driver_api gpio_nrfx_drv_api_funcs = {
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.pin_configure = gpio_nrfx_pin_configure,
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.port_get_raw = gpio_nrfx_port_get_raw,
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.port_set_masked_raw = gpio_nrfx_port_set_masked_raw,
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.port_set_bits_raw = gpio_nrfx_port_set_bits_raw,
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.port_clear_bits_raw = gpio_nrfx_port_clear_bits_raw,
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.port_toggle_bits = gpio_nrfx_port_toggle_bits,
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#ifdef CONFIG_GPIO_NRFX_INTERRUPT
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.pin_interrupt_configure = gpio_nrfx_pin_interrupt_configure,
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.manage_callback = gpio_nrfx_manage_callback,
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#endif
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#ifdef CONFIG_GPIO_GET_DIRECTION
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.port_get_direction = gpio_nrfx_port_get_direction,
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#endif
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};
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#define GPIOTE_PHANDLE(id) DT_INST_PHANDLE(id, gpiote_instance)
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#define GPIOTE_INST(id) DT_PROP(GPIOTE_PHANDLE(id), instance)
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#define GPIOTE_INSTANCE(id) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
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(NRFX_GPIOTE_INSTANCE(GPIOTE_INST(id))), \
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({ .p_reg = NULL }))
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/* Device instantiation is done with node labels because 'port_num' is
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* the peripheral number by SoC numbering. We therefore cannot use
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* DT_INST APIs here without wider changes.
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*/
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#define GPIOTE_CHECK(id) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
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(BUILD_ASSERT(DT_NODE_HAS_STATUS_OKAY(GPIOTE_PHANDLE(id)), \
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"Please enable GPIOTE instance for used GPIO port!")), \
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())
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#define GPIO_NRF_DEVICE(id) \
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GPIOTE_CHECK(id); \
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static const struct gpio_nrfx_cfg gpio_nrfx_p##id##_cfg = { \
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.common = { \
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.port_pin_mask = \
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GPIO_PORT_PIN_MASK_FROM_DT_INST(id), \
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}, \
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.port = _CONCAT(NRF_P, DT_INST_PROP(id, port)), \
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.port_num = DT_INST_PROP(id, port), \
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.edge_sense = DT_INST_PROP_OR(id, sense_edge_mask, 0), \
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.gpiote = GPIOTE_INSTANCE(id), \
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}; \
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\
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static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \
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\
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DEVICE_DT_INST_DEFINE(id, gpio_nrfx_init, \
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NULL, \
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&gpio_nrfx_p##id##_data, \
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&gpio_nrfx_p##id##_cfg, \
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PRE_KERNEL_1, \
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CONFIG_GPIO_INIT_PRIORITY, \
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&gpio_nrfx_drv_api_funcs);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_DEVICE)
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