492 lines
12 KiB
C
492 lines
12 KiB
C
/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT silabs_gecko_iadc
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#include <zephyr/drivers/adc.h>
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#include <em_iadc.h>
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#include <em_cmu.h>
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(iadc_gecko, CONFIG_ADC_LOG_LEVEL);
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/* Number of channels available. */
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#define GECKO_CHANNEL_COUNT 16
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#define GECKO_INTERNAL_REFERENCE_mV 1210
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#define GECKO_DATA_RES12BIT(DATA) ((DATA) & 0x0FFF)
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struct adc_gecko_channel_config {
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IADC_CfgAnalogGain_t gain;
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IADC_CfgReference_t reference;
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IADC_PosInput_t input_positive;
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IADC_NegInput_t input_negative;
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bool initialized;
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};
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struct adc_gecko_data {
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const struct device *dev;
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struct adc_context ctx;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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uint32_t channels;
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uint8_t channel_id;
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struct adc_gecko_channel_config channel_config[GECKO_CHANNEL_COUNT];
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};
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struct adc_gecko_config {
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IADC_Config_t config;
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IADC_TypeDef *base;
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void (*irq_cfg_func)(void);
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};
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static void adc_gecko_set_config(const struct device *dev)
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{
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struct adc_gecko_data *data = dev->data;
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struct adc_gecko_channel_config *channel_config = NULL;
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const struct adc_gecko_config *config = dev->config;
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IADC_TypeDef *iadc = (IADC_TypeDef *)config->base;
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IADC_InitSingle_t sInit = IADC_INITSINGLE_DEFAULT;
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IADC_SingleInput_t initSingleInput = IADC_SINGLEINPUT_DEFAULT;
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IADC_Init_t init = IADC_INIT_DEFAULT;
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IADC_AllConfigs_t initAllConfigs = IADC_ALLCONFIGS_DEFAULT;
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channel_config = &data->channel_config[data->channel_id];
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initSingleInput.posInput = channel_config->input_positive;
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initSingleInput.negInput = channel_config->input_negative;
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initAllConfigs.configs[0].analogGain = channel_config->gain;
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initAllConfigs.configs[0].reference = channel_config->reference;
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IADC_init(iadc, &init, &initAllConfigs);
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IADC_initSingle(iadc, &sInit, &initSingleInput);
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}
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static int adc_gecko_check_buffer_size(const struct adc_sequence *sequence,
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uint8_t active_channels)
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{
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size_t needed_buffer_size;
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needed_buffer_size = active_channels * sizeof(uint16_t);
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if (sequence->options) {
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needed_buffer_size *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < needed_buffer_size) {
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LOG_DBG("Provided buffer is too small (%u/%u)",
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sequence->buffer_size, needed_buffer_size);
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return -ENOMEM;
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}
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return 0;
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}
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static int adc_gecko_check_resolution(const struct adc_sequence *sequence)
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{
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int value = sequence->resolution;
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/* Base resolution is on 12, it can be changed only up by oversampling */
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if (value != 12) {
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return -EINVAL;
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}
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return value;
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}
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static int start_read(const struct device *dev, const struct adc_sequence *sequence)
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{
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struct adc_gecko_data *data = dev->data;
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uint32_t channels;
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uint8_t channel_count;
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uint8_t index;
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int res;
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/* Check if at least 1 channel is requested */
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if (sequence->channels == 0) {
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LOG_DBG("No channel requested");
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return -EINVAL;
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}
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if (sequence->oversampling) {
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LOG_ERR("Oversampling is not supported");
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return -ENOTSUP;
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}
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/* Check resolution setting */
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res = adc_gecko_check_resolution(sequence);
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if (res < 0) {
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return -EINVAL;
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}
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/* Verify all requested channels are initialized and store resolution */
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channels = sequence->channels;
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channel_count = 0;
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while (channels) {
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/* Iterate through all channels and check if they are initialized */
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index = find_lsb_set(channels) - 1;
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if (index >= GECKO_CHANNEL_COUNT) {
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LOG_DBG("Requested channel index not available: %d", index);
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return -EINVAL;
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}
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if (!data->channel_config[index].initialized) {
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LOG_DBG("Channel not initialized");
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return -EINVAL;
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}
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channel_count++;
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channels &= ~BIT(index);
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}
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/* Check buffer size */
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res = adc_gecko_check_buffer_size(sequence, channel_count);
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if (res < 0) {
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return res;
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}
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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res = adc_context_wait_for_completion(&data->ctx);
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return res;
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}
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static void adc_gecko_start_channel(const struct device *dev)
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{
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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IADC_TypeDef *iadc = (IADC_TypeDef *)config->base;
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data->channel_id = find_lsb_set(data->channels) - 1;
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LOG_DBG("Starting channel %d", data->channel_id);
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adc_gecko_set_config(data->dev);
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/* Enable single conversion interrupt */
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IADC_enableInt(iadc, IADC_IEN_SINGLEDONE);
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/* Start single conversion */
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IADC_command(iadc, iadcCmdStartSingle);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct adc_gecko_data *data =
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CONTAINER_OF(ctx, struct adc_gecko_data, ctx);
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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adc_gecko_start_channel(data->dev);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat_sampling)
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{
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struct adc_gecko_data *data =
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CONTAINER_OF(ctx, struct adc_gecko_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static void adc_gecko_isr(void *arg)
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{
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const struct device *dev = (const struct device *)arg;
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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IADC_TypeDef *iadc = config->base;
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IADC_Result_t sample;
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uint32_t flags, err;
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/*
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* IRQ is enabled only for SINGLEDONE. However, other
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* interrupt flags - the ones singaling an error - may be
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* set simultaneously with SINGLEDONE. We read & clear them
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* to determine if conversion is successful or not.
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*/
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flags = IADC_getInt(iadc);
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__ASSERT(flags & IADC_IF_SINGLEDONE,
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"unexpected IADC IRQ (flags=0x%08x)!", flags);
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err = flags & (IADC_IF_PORTALLOCERR |
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IADC_IF_POLARITYERR |
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IADC_IF_EM23ABORTERROR);
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if (!err) {
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sample = IADC_readSingleResult(iadc);
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*data->buffer++ = GECKO_DATA_RES12BIT((uint16_t)sample.data);
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data->channels &= ~BIT(data->channel_id);
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if (data->channels) {
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adc_gecko_start_channel(dev);
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} else {
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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} else {
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LOG_ERR("IADC conversion error, flags=%08x", err);
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adc_context_complete(&data->ctx, -EIO);
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}
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IADC_clearInt(iadc, IADC_IF_SINGLEDONE | err);
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}
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static int adc_gecko_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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struct adc_gecko_data *data = dev->data;
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int error;
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adc_context_lock(&data->ctx, false, NULL);
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error = start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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#ifdef CONFIG_ADC_ASYNC
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static int adc_gecko_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct adc_gecko_data *data = dev->data;
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int error;
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adc_context_lock(&data->ctx, true, async);
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error = start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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#endif
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static void adc_gecko_gpio_busalloc_pos(IADC_PosInput_t input)
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{
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uint32_t port = ((input << _IADC_SCAN_PINPOS_SHIFT) &
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_IADC_SCAN_PORTPOS_MASK) >> _IADC_SCAN_PORTPOS_SHIFT;
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uint32_t pin = ((input << _IADC_SCAN_PINPOS_SHIFT) &
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_IADC_SCAN_PINPOS_MASK) >> _IADC_SCAN_PINPOS_SHIFT;
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switch (port) {
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case _IADC_SCAN_PORTPOS_PORTA:
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if (pin & 1) {
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GPIO->ABUSALLOC |= GPIO_ABUSALLOC_AODD0_ADC0;
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} else {
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GPIO->ABUSALLOC |= GPIO_ABUSALLOC_AEVEN0_ADC0;
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}
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break;
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case _IADC_SCAN_PORTPOS_PORTB:
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if (pin & 1) {
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GPIO->BBUSALLOC |= GPIO_BBUSALLOC_BODD0_ADC0;
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} else {
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GPIO->BBUSALLOC |= GPIO_BBUSALLOC_BEVEN0_ADC0;
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}
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break;
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case _IADC_SCAN_PORTPOS_PORTC:
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case _IADC_SCAN_PORTPOS_PORTD:
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if (pin & 1) {
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GPIO->CDBUSALLOC |= GPIO_CDBUSALLOC_CDODD0_ADC0;
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} else {
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GPIO->CDBUSALLOC |= GPIO_CDBUSALLOC_CDEVEN0_ADC0;
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}
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break;
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default:
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}
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}
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static void adc_gecko_gpio_busalloc_neg(IADC_NegInput_t input)
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{
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uint32_t port = ((input << _IADC_SCAN_PINNEG_SHIFT) &
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_IADC_SCAN_PORTNEG_MASK) >> _IADC_SCAN_PORTNEG_SHIFT;
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uint32_t pin = ((input << _IADC_SCAN_PINNEG_SHIFT) &
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_IADC_SCAN_PINNEG_MASK) >> _IADC_SCAN_PINNEG_SHIFT;
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switch (port) {
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case _IADC_SCAN_PORTNEG_PORTA:
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if (pin & 1) {
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GPIO->ABUSALLOC |= GPIO_ABUSALLOC_AODD0_ADC0;
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} else {
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GPIO->ABUSALLOC |= GPIO_ABUSALLOC_AEVEN0_ADC0;
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}
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break;
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case _IADC_SCAN_PORTNEG_PORTB:
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if (pin & 1) {
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GPIO->BBUSALLOC |= GPIO_BBUSALLOC_BODD0_ADC0;
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} else {
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GPIO->BBUSALLOC |= GPIO_BBUSALLOC_BEVEN0_ADC0;
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}
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break;
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case _IADC_SCAN_PORTNEG_PORTC:
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case _IADC_SCAN_PORTNEG_PORTD:
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if (pin & 1) {
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GPIO->CDBUSALLOC |= GPIO_CDBUSALLOC_CDODD0_ADC0;
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} else {
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GPIO->CDBUSALLOC |= GPIO_CDBUSALLOC_CDEVEN0_ADC0;
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}
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break;
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default:
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}
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}
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static int adc_gecko_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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struct adc_gecko_data *data = dev->data;
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struct adc_gecko_channel_config *channel_config = NULL;
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if (channel_cfg->channel_id < GECKO_CHANNEL_COUNT) {
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channel_config = &data->channel_config[channel_cfg->channel_id];
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} else {
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LOG_DBG("Requested channel index not available: %d", channel_cfg->channel_id);
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return -EINVAL;
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}
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channel_config->initialized = false;
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channel_config->input_positive = channel_cfg->input_positive;
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if (channel_cfg->differential) {
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channel_config->input_negative = channel_cfg->input_negative;
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} else {
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channel_config->input_negative = iadcNegInputGnd;
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}
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/* Setup input */
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switch (channel_cfg->gain) {
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#if defined(_IADC_CFG_ANALOGGAIN_ANAGAIN0P25)
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case ADC_GAIN_1_4:
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channel_config->gain = iadcCfgAnalogGain0P25x;
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break;
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#endif
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case ADC_GAIN_1_2:
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channel_config->gain = iadcCfgAnalogGain0P5x;
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break;
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case ADC_GAIN_1:
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channel_config->gain = iadcCfgAnalogGain1x;
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break;
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case ADC_GAIN_2:
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channel_config->gain = iadcCfgAnalogGain2x;
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break;
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case ADC_GAIN_3:
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channel_config->gain = iadcCfgAnalogGain3x;
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break;
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case ADC_GAIN_4:
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channel_config->gain = iadcCfgAnalogGain4x;
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break;
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default:
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LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain);
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return -ENOTSUP;
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}
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/* Setup reference */
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switch (channel_cfg->reference) {
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case ADC_REF_VDD_1:
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channel_config->reference = iadcCfgReferenceVddx;
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break;
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case ADC_REF_INTERNAL:
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channel_config->reference = iadcCfgReferenceInt1V2;
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break;
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#if defined(_IADC_CFG_REFSEL_VREF2P5)
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case ADC_REF_EXTERNAL1:
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channel_config->reference = iadcCfgReferenceExt2V5;
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break;
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#endif
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case ADC_REF_EXTERNAL0:
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channel_config->reference = iadcCfgReferenceExt1V25;
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break;
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default:
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LOG_ERR("unsupported channel reference type '%d'",
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channel_cfg->reference);
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return -ENOTSUP;
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}
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/* Setup GPIO xBUSALLOC registers if channel uses GPIO pin */
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adc_gecko_gpio_busalloc_pos(channel_config->input_positive);
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adc_gecko_gpio_busalloc_neg(channel_config->input_negative);
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channel_config->initialized = true;
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LOG_DBG("Channel setup succeeded!");
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return 0;
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}
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static int adc_gecko_init(const struct device *dev)
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{
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const struct adc_gecko_config *config = dev->config;
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struct adc_gecko_data *data = dev->data;
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CMU_ClockEnable(cmuClock_IADC0, true);
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/* Select clock for IADC */
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CMU_ClockSelectSet(cmuClock_IADCCLK, cmuSelect_FSRCO); /* FSRCO - 20MHz */
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data->dev = dev;
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config->irq_cfg_func();
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api api_gecko_adc_driver_api = {
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.channel_setup = adc_gecko_channel_setup,
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.read = adc_gecko_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = adc_gecko_read_async,
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#endif
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.ref_internal = GECKO_INTERNAL_REFERENCE_mV,
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};
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#define GECKO_IADC_INIT(n) \
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\
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static void adc_gecko_config_func_##n(void); \
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\
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const static struct adc_gecko_config adc_gecko_config_##n = { \
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.base = (IADC_TypeDef *)DT_INST_REG_ADDR(n),\
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.irq_cfg_func = adc_gecko_config_func_##n, \
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}; \
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static struct adc_gecko_data adc_gecko_data_##n = { \
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ADC_CONTEXT_INIT_TIMER(adc_gecko_data_##n, ctx), \
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ADC_CONTEXT_INIT_LOCK(adc_gecko_data_##n, ctx), \
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ADC_CONTEXT_INIT_SYNC(adc_gecko_data_##n, ctx), \
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}; \
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static void adc_gecko_config_func_##n(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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adc_gecko_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}; \
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DEVICE_DT_INST_DEFINE(n, \
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&adc_gecko_init, NULL, \
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&adc_gecko_data_##n, &adc_gecko_config_##n,\
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POST_KERNEL, CONFIG_ADC_INIT_PRIORITY, \
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&api_gecko_adc_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(GECKO_IADC_INIT)
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