5e4e0298e9
We assume that all x86 CPUs do have clflush instructions. And the cache line size is now provided through DTS. So detecting clflush instruction as well as the cache line size is no longer required at runtime and thus removed. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
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doc | ||
CMakeLists.txt | ||
Kconfig.defconfig | ||
Kconfig.soc | ||
cpu.c | ||
linker.ld | ||
soc.h |