zephyr/soc/x86/atom
Tomasz Bursztyka 5e4e0298e9 arch/x86: Generalize cache manipulation functions
We assume that all x86 CPUs do have clflush instructions.
And the cache line size is now provided through DTS.

So detecting clflush instruction as well as the cache line size is no
longer required at runtime and thus removed.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-02-15 09:43:30 -05:00
..
CMakeLists.txt
Kconfig.defconfig arch/x86: Generalize cache manipulation functions 2021-02-15 09:43:30 -05:00
Kconfig.soc x86: reserve the first megabyte 2021-01-23 19:47:23 -05:00
linker.ld
soc.h